[PATCH] D128286: [RISCV] Disable <vscale x 1 x *> types with Zve32x or Zve32f.

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

Warning, I may be miss understanding the problem you're solving here, but...

The case you mention appear to be specific to when VLEN=32 right?  If so, a cleaner way of phrasing the illegal cases would seem to be to compute the effective vector length after LMUL (i.e. VLEN/8 for mf8), and then disallow any case where the implied vector length is shorter than a single element of the element type.

A case to consider, what happens if VLEN=64?  Should we be disallowing e.g. mf2 e64?  (Seems like we should be right?)  If so, can we approach the problem the same?

The use of RVVBitsPerBlock feels like a red-herring here.  In particular, it's not clear to me why the value remains 64 on a VLEN=32 configuration.

Anyways, purely non-blocking comment.  Not sure if I've actually understood this or not.  :)


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https://reviews.llvm.org/D128286