[PATCH] D128286: [RISCV] Disable <vscale x 1 x *> types with Zve32x or Zve32f.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 21 10:45:32 PDT 2022
craig.topper updated this revision to Diff 438752.
craig.topper added a comment.
Add basic sanity test that type legalization will at least try to handle these types.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D128286/new/
https://reviews.llvm.org/D128286
Files:
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/zve32-types.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D128286.438752.patch
Type: text/x-patch
Size: 7545 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220621/206ac0f3/attachment.bin>
More information about the llvm-commits
mailing list