[PATCH] D128286: [RISCV] Disable <vscale x 1 x *> types with Zve32x or Zve32f.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 21 10:45:32 PDT 2022


craig.topper updated this revision to Diff 438752.
craig.topper added a comment.

Add basic sanity test that type legalization will at least try to handle these types.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128286/new/

https://reviews.llvm.org/D128286

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/zve32-types.ll

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