[PATCH] D127848: [CodeGen] Fix the bug of machine sink

Matthias Braun via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 15 08:51:33 PDT 2022


MatzeB added inline comments.


================
Comment at: llvm/lib/CodeGen/MachineSink.cpp:802
     // Ignore non-register operands.
     if (!MO.isReg())
       continue;
----------------
shchenz wrote:
> LuoYuanke wrote:
> > shchenz wrote:
> > > Maybe better to exclude the undef case at the very beginning?
> > So do we also ingore undef value for physical register?
> Do we have undef physical register? I don't see such usage and sounds weird to me, it is a physical register but it is undef....
Yes the definition of a physical register may not be visible in the MIR (could be a parameter, a side effect of a call or exception unwinding etc...)

And physreg uses can be undef just like VRegs.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127848/new/

https://reviews.llvm.org/D127848



More information about the llvm-commits mailing list