[PATCH] D127848: [CodeGen] Fix the bug of machine sink

[Matthias Braun via Phabricator via llvm-commits]

MatzeB added a comment.

I see this code in the MachineVerifier:

  } else if (MRI->def_empty(Reg)) {
    report("Reading virtual register without a def", MO, MONum);

Which reads to me that we do not allow virtual registers without a definition if there is at least 1 read of the register. But I guess that means you can indeed have a vreg without a def if all the uses are marked `undef`.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D127848/new/

https://reviews.llvm.org/D127848