[PATCH] D127721: [RISCV][NFC] Add load/store instructions in rv64*-invalid.s

[Shao-Ce SUN via Phabricator via llvm-commits]

sunshaoce added inline comments.


================
Comment at: llvm/test/MC/RISCV/rv64zdinx-invalid.s:4
+# Not support float registers
+flw fa4, 12(sp) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'F' (Single-Precision Floating-Point)
+
----------------
benshi001 wrote:
> I guess you probably want `fld` and `fsd` ?
In zdinx, you should use `ld` rather than `fld` or `flw`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127721/new/

https://reviews.llvm.org/D127721