[PATCH] D127317: [AArch64][SME] Add ldr/str (fill/spill) intrinsics

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/SME/sme-intrinsics-loads.ll:265
+; CHECK-NEXT:    ret
+  %base = getelementptr i8, i8* %ptr, i64 15
+  call void @llvm.aarch64.sme.ldr(i32 0, i8* %base)
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aemerson wrote:
> I'm not following why a byte offset from a pointer would lower into an offset scaled by VL?
That's an excellent point @aemerson! Something has clearly gone wrong here - I'll investigate!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127317/new/

https://reviews.llvm.org/D127317