[PATCH] D127317: [AArch64][SME] Add ldr/str (fill/spill) intrinsics

David Sherwood via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 9 03:43:07 PDT 2022


david-arm updated this revision to Diff 435487.
david-arm added a comment.

- Fixed bug in isel pattern for imm offset forms of ldr/str


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127317/new/

https://reviews.llvm.org/D127317

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/SMEInstrFormats.td
  llvm/test/CodeGen/AArch64/SME/sme-intrinsics-loads.ll
  llvm/test/CodeGen/AArch64/SME/sme-intrinsics-stores.ll

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