[PATCH] D127354: Implement capability to optimize add negative into subtract positive in AArch64.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

This shoudl have been picked up by `foldAddSubMasked1` in the generic DAG combiner but wasn't because the BUILD_VECTOR has i8 element type and i32 constant operands. We should fix that to not require the widths to match.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D127354/new/

https://reviews.llvm.org/D127354