[PATCH] D127354: Implement capability to optimize add negative into subtract positive in AArch64.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:15425
+      unsigned Depth = 0;
+      Known = DAG.computeKnownBits(RHS, Depth + 1);
+      if (Known.isConstant() && Known.getConstant().isOne())
----------------
Declare Known on the line where it is assigned.

```
KnownBits Known = DAG.computeKnownBits...
```


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:15432
+      unsigned Depth = 0;
+      Known = DAG.computeKnownBits(LHS, Depth);
+      if (Known.isConstant() && Known.getConstant().isOne())
----------------
This is no inconsistent with the other call to computeKnownBits. I think for both you can do `DAG.computeKnownBits(LHS)` or `DAG.computeKnownBits(RHS)`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127354/new/

https://reviews.llvm.org/D127354