[PATCH] D127354: Implement capability to optimize add negative into subtract positive in AArch64.

Adrian Tong via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 8 16:04:18 PDT 2022


adriantong1024 added a comment.

In D127354#3568503 <https://reviews.llvm.org/D127354#3568503>, @craig.topper wrote:

> This shoudl have been picked up by `foldAddSubMasked1` in the generic DAG combiner but wasn't because the BUILD_VECTOR has i8 element type and i32 constant operands. We should fix that to not require the widths to match.

Oh. let me look into it. Thanks for the pointer


Repository:
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  https://reviews.llvm.org/D127354/new/

https://reviews.llvm.org/D127354



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