[llvm] 4fed5f1 - [AMDGPU][GFX8][DOC][NFC] Update assembler syntax description
Dmitry Preobrazhensky via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 6 07:42:46 PDT 2022
Author: Dmitry Preobrazhensky
Date: 2022-06-06T17:42:16+03:00
New Revision: 4fed5f174fa57c73907bb3344018a5f9c2bc2e68
URL: https://github.com/llvm/llvm-project/commit/4fed5f174fa57c73907bb3344018a5f9c2bc2e68
DIFF: https://github.com/llvm/llvm-project/commit/4fed5f174fa57c73907bb3344018a5f9c2bc2e68.diff
LOG: [AMDGPU][GFX8][DOC][NFC] Update assembler syntax description
Summary of changes:
- Updated MUBUF lds syntax (see https://reviews.llvm.org/D124485).
- Enabled literals with src0 for v_madak*, v_madmk* (see https://reviews.llvm.org/D111067).
- Minor bug fixing.
Added:
llvm/docs/AMDGPU/gfx8_imm16_73139a.rst
llvm/docs/AMDGPU/gfx8_imm16_a04fb3.rst
llvm/docs/AMDGPU/gfx8_m_254bcb.rst
llvm/docs/AMDGPU/gfx8_m_f5d306.rst
llvm/docs/AMDGPU/gfx8_opt_0d447d.rst
llvm/docs/AMDGPU/gfx8_opt_847aed.rst
llvm/docs/AMDGPU/gfx8_sbase_010ce0.rst
llvm/docs/AMDGPU/gfx8_sbase_589eed.rst
llvm/docs/AMDGPU/gfx8_sdata_7cbd60.rst
llvm/docs/AMDGPU/gfx8_sdata_c8788e.rst
llvm/docs/AMDGPU/gfx8_sdata_e587f5.rst
llvm/docs/AMDGPU/gfx8_sdst_0804b1.rst
llvm/docs/AMDGPU/gfx8_sdst_1cf20d.rst
llvm/docs/AMDGPU/gfx8_sdst_313759.rst
llvm/docs/AMDGPU/gfx8_sdst_362c37.rst
llvm/docs/AMDGPU/gfx8_sdst_61db0e.rst
llvm/docs/AMDGPU/gfx8_sdst_6eddac.rst
llvm/docs/AMDGPU/gfx8_sdst_78579b.rst
llvm/docs/AMDGPU/gfx8_sdst_8d900a.rst
llvm/docs/AMDGPU/gfx8_simm32_6f0844.rst
llvm/docs/AMDGPU/gfx8_simm32_a3e80c.rst
llvm/docs/AMDGPU/gfx8_simm32_be0c1c.rst
llvm/docs/AMDGPU/gfx8_soffset_499d5b.rst
llvm/docs/AMDGPU/gfx8_soffset_abb420.rst
llvm/docs/AMDGPU/gfx8_soffset_ac5750.rst
llvm/docs/AMDGPU/gfx8_src_021c9b.rst
llvm/docs/AMDGPU/gfx8_src_2dcf49.rst
llvm/docs/AMDGPU/gfx8_src_39a989.rst
llvm/docs/AMDGPU/gfx8_src_516946.rst
llvm/docs/AMDGPU/gfx8_src_67227c.rst
llvm/docs/AMDGPU/gfx8_src_87dc5c.rst
llvm/docs/AMDGPU/gfx8_src_8a6ea8.rst
llvm/docs/AMDGPU/gfx8_src_a13aeb.rst
llvm/docs/AMDGPU/gfx8_src_b38805.rst
llvm/docs/AMDGPU/gfx8_src_d9175b.rst
llvm/docs/AMDGPU/gfx8_src_df6b53.rst
llvm/docs/AMDGPU/gfx8_srsrc_cf7132.rst
llvm/docs/AMDGPU/gfx8_srsrc_e73d16.rst
llvm/docs/AMDGPU/gfx8_ssrc_0eec95.rst
llvm/docs/AMDGPU/gfx8_ssrc_133cbc.rst
llvm/docs/AMDGPU/gfx8_ssrc_6706dc.rst
llvm/docs/AMDGPU/gfx8_ssrc_a2142e.rst
llvm/docs/AMDGPU/gfx8_ssrc_c8788e.rst
llvm/docs/AMDGPU/gfx8_ssrc_dcd0d4.rst
llvm/docs/AMDGPU/gfx8_ssrc_e587f5.rst
llvm/docs/AMDGPU/gfx8_ssrc_f308b1.rst
llvm/docs/AMDGPU/gfx8_ssrc_f48190.rst
llvm/docs/AMDGPU/gfx8_vaddr_9f7133.rst
llvm/docs/AMDGPU/gfx8_vaddr_b73dc0.rst
llvm/docs/AMDGPU/gfx8_vaddr_e9b690.rst
llvm/docs/AMDGPU/gfx8_vaddr_f20ee4.rst
llvm/docs/AMDGPU/gfx8_vdata0_6802ce.rst
llvm/docs/AMDGPU/gfx8_vdata0_fd235e.rst
llvm/docs/AMDGPU/gfx8_vdata1_6802ce.rst
llvm/docs/AMDGPU/gfx8_vdata1_fd235e.rst
llvm/docs/AMDGPU/gfx8_vdata_325b78.rst
llvm/docs/AMDGPU/gfx8_vdata_4d8ecf.rst
llvm/docs/AMDGPU/gfx8_vdata_4f639e.rst
llvm/docs/AMDGPU/gfx8_vdata_56f215.rst
llvm/docs/AMDGPU/gfx8_vdata_6802ce.rst
llvm/docs/AMDGPU/gfx8_vdata_87fb90.rst
llvm/docs/AMDGPU/gfx8_vdata_886702.rst
llvm/docs/AMDGPU/gfx8_vdata_a9eee3.rst
llvm/docs/AMDGPU/gfx8_vdata_aeb804.rst
llvm/docs/AMDGPU/gfx8_vdata_b2a787.rst
llvm/docs/AMDGPU/gfx8_vdata_c08393.rst
llvm/docs/AMDGPU/gfx8_vdata_c61803.rst
llvm/docs/AMDGPU/gfx8_vdata_e016a1.rst
llvm/docs/AMDGPU/gfx8_vdata_f2bf57.rst
llvm/docs/AMDGPU/gfx8_vdata_fd235e.rst
llvm/docs/AMDGPU/gfx8_vdst_0b9599.rst
llvm/docs/AMDGPU/gfx8_vdst_3c54c3.rst
llvm/docs/AMDGPU/gfx8_vdst_3c6fb6.rst
llvm/docs/AMDGPU/gfx8_vdst_3d7dcf.rst
llvm/docs/AMDGPU/gfx8_vdst_463513.rst
llvm/docs/AMDGPU/gfx8_vdst_48e42f.rst
llvm/docs/AMDGPU/gfx8_vdst_5d50a1.rst
llvm/docs/AMDGPU/gfx8_vdst_69a144.rst
llvm/docs/AMDGPU/gfx8_vdst_7eb33e.rst
llvm/docs/AMDGPU/gfx8_vdst_875645.rst
llvm/docs/AMDGPU/gfx8_vdst_89680f.rst
llvm/docs/AMDGPU/gfx8_vdst_a49b76.rst
llvm/docs/AMDGPU/gfx8_vdst_bdb32f.rst
llvm/docs/AMDGPU/gfx8_vdst_d0dc43.rst
llvm/docs/AMDGPU/gfx8_vdst_d7c57e.rst
llvm/docs/AMDGPU/gfx8_vdst_d85497.rst
llvm/docs/AMDGPU/gfx8_vdst_e0515f.rst
llvm/docs/AMDGPU/gfx8_vdst_f47754.rst
llvm/docs/AMDGPU/gfx8_vsrc_533a4e.rst
llvm/docs/AMDGPU/gfx8_vsrc_6802ce.rst
llvm/docs/AMDGPU/gfx8_vsrc_e016a1.rst
llvm/docs/AMDGPU/gfx8_vsrc_fd235e.rst
Modified:
llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst
llvm/docs/AMDGPU/gfx8_hwreg.rst
llvm/docs/AMDGPU/gfx8_msg.rst
llvm/docs/AMDGPU/gfx8_tgt.rst
Removed:
llvm/docs/AMDGPU/gfx8_imm16.rst
llvm/docs/AMDGPU/gfx8_imm16_1.rst
llvm/docs/AMDGPU/gfx8_imm16_2.rst
llvm/docs/AMDGPU/gfx8_m.rst
llvm/docs/AMDGPU/gfx8_m_1.rst
llvm/docs/AMDGPU/gfx8_opt.rst
llvm/docs/AMDGPU/gfx8_sbase.rst
llvm/docs/AMDGPU/gfx8_sbase_1.rst
llvm/docs/AMDGPU/gfx8_sdata.rst
llvm/docs/AMDGPU/gfx8_sdata_1.rst
llvm/docs/AMDGPU/gfx8_sdata_2.rst
llvm/docs/AMDGPU/gfx8_sdst.rst
llvm/docs/AMDGPU/gfx8_sdst_1.rst
llvm/docs/AMDGPU/gfx8_sdst_2.rst
llvm/docs/AMDGPU/gfx8_sdst_3.rst
llvm/docs/AMDGPU/gfx8_sdst_4.rst
llvm/docs/AMDGPU/gfx8_sdst_5.rst
llvm/docs/AMDGPU/gfx8_sdst_6.rst
llvm/docs/AMDGPU/gfx8_sdst_7.rst
llvm/docs/AMDGPU/gfx8_simm32.rst
llvm/docs/AMDGPU/gfx8_simm32_1.rst
llvm/docs/AMDGPU/gfx8_simm32_2.rst
llvm/docs/AMDGPU/gfx8_soffset.rst
llvm/docs/AMDGPU/gfx8_soffset_1.rst
llvm/docs/AMDGPU/gfx8_soffset_2.rst
llvm/docs/AMDGPU/gfx8_src.rst
llvm/docs/AMDGPU/gfx8_src_1.rst
llvm/docs/AMDGPU/gfx8_src_10.rst
llvm/docs/AMDGPU/gfx8_src_2.rst
llvm/docs/AMDGPU/gfx8_src_3.rst
llvm/docs/AMDGPU/gfx8_src_4.rst
llvm/docs/AMDGPU/gfx8_src_5.rst
llvm/docs/AMDGPU/gfx8_src_6.rst
llvm/docs/AMDGPU/gfx8_src_7.rst
llvm/docs/AMDGPU/gfx8_src_8.rst
llvm/docs/AMDGPU/gfx8_src_9.rst
llvm/docs/AMDGPU/gfx8_srsrc.rst
llvm/docs/AMDGPU/gfx8_srsrc_1.rst
llvm/docs/AMDGPU/gfx8_ssrc.rst
llvm/docs/AMDGPU/gfx8_ssrc_1.rst
llvm/docs/AMDGPU/gfx8_ssrc_2.rst
llvm/docs/AMDGPU/gfx8_ssrc_3.rst
llvm/docs/AMDGPU/gfx8_ssrc_4.rst
llvm/docs/AMDGPU/gfx8_ssrc_5.rst
llvm/docs/AMDGPU/gfx8_ssrc_6.rst
llvm/docs/AMDGPU/gfx8_ssrc_7.rst
llvm/docs/AMDGPU/gfx8_ssrc_8.rst
llvm/docs/AMDGPU/gfx8_vaddr.rst
llvm/docs/AMDGPU/gfx8_vaddr_1.rst
llvm/docs/AMDGPU/gfx8_vaddr_2.rst
llvm/docs/AMDGPU/gfx8_vaddr_3.rst
llvm/docs/AMDGPU/gfx8_vdata.rst
llvm/docs/AMDGPU/gfx8_vdata0.rst
llvm/docs/AMDGPU/gfx8_vdata0_1.rst
llvm/docs/AMDGPU/gfx8_vdata1.rst
llvm/docs/AMDGPU/gfx8_vdata1_1.rst
llvm/docs/AMDGPU/gfx8_vdata_1.rst
llvm/docs/AMDGPU/gfx8_vdata_10.rst
llvm/docs/AMDGPU/gfx8_vdata_11.rst
llvm/docs/AMDGPU/gfx8_vdata_12.rst
llvm/docs/AMDGPU/gfx8_vdata_13.rst
llvm/docs/AMDGPU/gfx8_vdata_14.rst
llvm/docs/AMDGPU/gfx8_vdata_2.rst
llvm/docs/AMDGPU/gfx8_vdata_3.rst
llvm/docs/AMDGPU/gfx8_vdata_4.rst
llvm/docs/AMDGPU/gfx8_vdata_5.rst
llvm/docs/AMDGPU/gfx8_vdata_6.rst
llvm/docs/AMDGPU/gfx8_vdata_7.rst
llvm/docs/AMDGPU/gfx8_vdata_8.rst
llvm/docs/AMDGPU/gfx8_vdata_9.rst
llvm/docs/AMDGPU/gfx8_vdst.rst
llvm/docs/AMDGPU/gfx8_vdst_1.rst
llvm/docs/AMDGPU/gfx8_vdst_10.rst
llvm/docs/AMDGPU/gfx8_vdst_11.rst
llvm/docs/AMDGPU/gfx8_vdst_12.rst
llvm/docs/AMDGPU/gfx8_vdst_13.rst
llvm/docs/AMDGPU/gfx8_vdst_14.rst
llvm/docs/AMDGPU/gfx8_vdst_15.rst
llvm/docs/AMDGPU/gfx8_vdst_16.rst
llvm/docs/AMDGPU/gfx8_vdst_17.rst
llvm/docs/AMDGPU/gfx8_vdst_2.rst
llvm/docs/AMDGPU/gfx8_vdst_3.rst
llvm/docs/AMDGPU/gfx8_vdst_4.rst
llvm/docs/AMDGPU/gfx8_vdst_5.rst
llvm/docs/AMDGPU/gfx8_vdst_6.rst
llvm/docs/AMDGPU/gfx8_vdst_7.rst
llvm/docs/AMDGPU/gfx8_vdst_8.rst
llvm/docs/AMDGPU/gfx8_vdst_9.rst
llvm/docs/AMDGPU/gfx8_vsrc.rst
llvm/docs/AMDGPU/gfx8_vsrc_1.rst
llvm/docs/AMDGPU/gfx8_vsrc_2.rst
llvm/docs/AMDGPU/gfx8_vsrc_3.rst
################################################################################
diff --git a/llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst b/llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst
index 967eaa768ff0..bfd18c8095e7 100644
--- a/llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst
+++ b/llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst
@@ -32,601 +32,601 @@ Instructions
DS
------------------------
+--
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_src2_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_and_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_and_src2_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_and_src2_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_append :ref:`vdst<amdgpu_synid_gfx8_vdst>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>`
- ds_cmpst_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_f64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_rtn_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_condxchg32_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_consume :ref:`vdst<amdgpu_synid_gfx8_vdst>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_dec_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_dec_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_dec_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_dec_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_dec_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_dec_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_gws_barrier :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_gws_init :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_gws_sema_br :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_src2_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_and_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_and_src2_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_and_src2_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_append :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_cmpst_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_fd235e>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_f64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_fd235e>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_fd235e>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_rtn_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_fd235e>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_condxchg32_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_consume :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_dec_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_dec_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_dec_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_dec_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_dec_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_dec_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_gws_barrier :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_gws_init :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_gws_sema_br :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
ds_gws_sema_p :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
ds_gws_sema_release_all :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
ds_gws_sema_v :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_inc_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_inc_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_inc_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_inc_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_inc_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_inc_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_f64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_i32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_i64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_i64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_src2_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_src2_f64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_src2_i32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_src2_i64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_f64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_i32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_i64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_i64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_src2_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_src2_f64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_src2_i32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_src2_i64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_mskor_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_mskor_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_mskor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_mskor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_inc_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_inc_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_inc_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_inc_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_inc_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_inc_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_f64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_i32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_i64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_i64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_src2_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_src2_f64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_src2_i32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_src2_i64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_f64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_i32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_i64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_i64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_src2_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_src2_f64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_src2_i32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_src2_i64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_mskor_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_mskor_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_fd235e>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_mskor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_mskor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_fd235e>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
ds_nop
- ds_or_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_or_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_or_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_or_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_or_src2_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_or_src2_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_ordered_count :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_permute_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>`
- ds_read2_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_read2_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_read2st64_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_read2st64_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_b128 :ref:`vdst<amdgpu_synid_gfx8_vdst_2>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_b96 :ref:`vdst<amdgpu_synid_gfx8_vdst_3>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_i8 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_rsub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_rsub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_rsub_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_rsub_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_rsub_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_rsub_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_sub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_sub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_sub_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_sub_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_sub_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_sub_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_swizzle_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`pattern<amdgpu_synid_sw_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrap_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write2_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_write2_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_write2st64_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_write2st64_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b128 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_2>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b16 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b8 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b96 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_3>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_src2_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_src2_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg2_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg2_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg2st64_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg2st64_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_xor_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_xor_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_xor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_xor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_xor_src2_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_xor_src2_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_or_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_or_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_or_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_or_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_or_src2_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_or_src2_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_ordered_count :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_permute_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_read2_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read2_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_69a144>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read2st64_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read2st64_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_69a144>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_b128 :ref:`vdst<amdgpu_synid_gfx8_vdst_69a144>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_b96 :ref:`vdst<amdgpu_synid_gfx8_vdst_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_i8 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_rsub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_rsub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_rsub_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_rsub_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_rsub_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_rsub_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_sub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_sub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_sub_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_sub_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_sub_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_sub_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_swizzle_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`pattern<amdgpu_synid_sw_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrap_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write2_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write2_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_fd235e>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_fd235e>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write2st64_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write2st64_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_fd235e>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_fd235e>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b128 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_e016a1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b16 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b8 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b96 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_56f215>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_src2_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_src2_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg2_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg2_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_69a144>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_fd235e>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_fd235e>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg2st64_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_6802ce>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_6802ce>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg2st64_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_69a144>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx8_vdata0_fd235e>`, :ref:`vdata1<amdgpu_synid_gfx8_vdata1_fd235e>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_xor_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_xor_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_xor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_xor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_xor_src2_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_xor_src2_b64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
EXP
------------------------
+---
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- exp :ref:`tgt<amdgpu_synid_gfx8_tgt>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc>`, :ref:`vsrc3<amdgpu_synid_gfx8_vsrc>` :ref:`done<amdgpu_synid_done>` :ref:`compr<amdgpu_synid_compr>` :ref:`vm<amdgpu_synid_vm>`
+ exp :ref:`tgt<amdgpu_synid_gfx8_tgt>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_533a4e>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_533a4e>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_533a4e>`, :ref:`vsrc3<amdgpu_synid_gfx8_vsrc_533a4e>` :ref:`done<amdgpu_synid_done>` :ref:`compr<amdgpu_synid_compr>` :ref:`vm<amdgpu_synid_vm>`
FLAT
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- flat_atomic_add :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_add_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_and :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_and_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_cmpswap :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_cmpswap_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_2>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_dec :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_dec_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_inc :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_inc_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_or :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_or_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_smax :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_smax_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_smin :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_smin_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_sub :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_sub_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_swap :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_swap_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_umax :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_umax_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_umin :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_umin_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_xor :ref:`vdst<amdgpu_synid_gfx8_vdst_4>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_xor_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_5>`::ref:`opt<amdgpu_synid_gfx8_opt>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_dword :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx8_vdst_3>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx8_vdst_2>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_sbyte :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_sshort :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_ubyte :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_ushort :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_byte :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_dword :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_3>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_2>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_short :ref:`vaddr<amdgpu_synid_gfx8_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx8_vdata>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_add :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_add_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_and :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_and_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_cmpswap :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_cmpswap_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_e016a1>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_dec :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_dec_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_inc :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_inc_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_or :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_or_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_smax :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_smax_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_smin :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_smin_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_sub :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_sub_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_swap :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_swap_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_umax :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_umax_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_umin :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_umin_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_xor :ref:`vdst<amdgpu_synid_gfx8_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_xor_x2 :ref:`vdst<amdgpu_synid_gfx8_vdst_463513>`::ref:`opt<amdgpu_synid_gfx8_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_dword :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx8_vdst_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx8_vdst_69a144>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_sbyte :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_sshort :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_ubyte :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_ushort :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_byte :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_dword :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_56f215>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_e016a1>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_short :ref:`vaddr<amdgpu_synid_gfx8_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
MIMG
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- image_atomic_add :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_and :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx8_vdata_5>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_dec :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_inc :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_or :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_smax :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_smin :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_sub :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_swap :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_umax :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_umin :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_xor :ref:`vdata<amdgpu_synid_gfx8_vdata_4>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_gather4 :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_b :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_b_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_b_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_b_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_b :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_b_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_b_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_b_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_l :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_l_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_lz :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_lz_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_c_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_l :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_l_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_lz :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_lz_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_gather4_o :ref:`vdst<amdgpu_synid_gfx8_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_get_lod :ref:`vdst<amdgpu_synid_gfx8_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_get_resinfo :ref:`vdst<amdgpu_synid_gfx8_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_load :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_load_mip :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_load_mip_pck :ref:`vdst<amdgpu_synid_gfx8_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_load_mip_pck_sgn :ref:`vdst<amdgpu_synid_gfx8_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_load_pck :ref:`vdst<amdgpu_synid_gfx8_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_load_pck_sgn :ref:`vdst<amdgpu_synid_gfx8_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_sample :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_b :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_b_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_b_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_b_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_b :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_b_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_b_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_b_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cd_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_d_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_l :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_l_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_lz :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_lz_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_c_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cd_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_d_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_l :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_l_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_lz :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_lz_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_sample_o :ref:`vdst<amdgpu_synid_gfx8_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_store :ref:`vdata<amdgpu_synid_gfx8_vdata_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_store_mip :ref:`vdata<amdgpu_synid_gfx8_vdata_6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_store_mip_pck :ref:`vdata<amdgpu_synid_gfx8_vdata_7>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_store_pck :ref:`vdata<amdgpu_synid_gfx8_vdata_7>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_2>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_add :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_and :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx8_vdata_4d8ecf>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_dec :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_inc :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_or :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_smax :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_smin :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_sub :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_swap :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_umax :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_umin :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_xor :ref:`vdata<amdgpu_synid_gfx8_vdata_325b78>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_gather4 :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_b :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_b_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_b_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_b_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_b :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_b_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_b_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_b_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_l :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_l_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_lz :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_lz_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_c_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_l :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_l_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_lz :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_lz_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_gather4_o :ref:`vdst<amdgpu_synid_gfx8_vdst_e0515f>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_get_lod :ref:`vdst<amdgpu_synid_gfx8_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_get_resinfo :ref:`vdst<amdgpu_synid_gfx8_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_load :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_load_mip :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_load_mip_pck :ref:`vdst<amdgpu_synid_gfx8_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_load_mip_pck_sgn :ref:`vdst<amdgpu_synid_gfx8_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_load_pck :ref:`vdst<amdgpu_synid_gfx8_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_load_pck_sgn :ref:`vdst<amdgpu_synid_gfx8_vdst_3d7dcf>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_sample :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_b :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_b_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_b_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_b_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_b :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_b_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_b_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_b_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cd_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_d_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_l :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_l_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_lz :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_lz_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_c_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cd_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d_cl :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d_cl_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_d_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_l :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_l_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_lz :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_lz_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_sample_o :ref:`vdst<amdgpu_synid_gfx8_vdst_0b9599>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>`, :ref:`ssamp<amdgpu_synid_gfx8_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_store :ref:`vdata<amdgpu_synid_gfx8_vdata_a9eee3>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_store_mip :ref:`vdata<amdgpu_synid_gfx8_vdata_a9eee3>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_store_mip_pck :ref:`vdata<amdgpu_synid_gfx8_vdata_c08393>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_store_pck :ref:`vdata<amdgpu_synid_gfx8_vdata_c08393>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_e9b690>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_cf7132>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
MTBUF
------------------------
+-----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- tbuffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx8_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx8_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx8_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx8_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_x :ref:`vdst<amdgpu_synid_gfx8_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx8_vdst_14>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx8_vdst_15>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx8_vdst_16>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx8_vdata_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx8_vdata_9>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx8_vdata_10>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx8_vdata_11>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_x :ref:`vdata<amdgpu_synid_gfx8_vdata>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx8_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx8_vdata_3>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx8_vdata_2>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx8_vdst_d85497>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx8_vdst_3c54c3>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx8_vdst_3c6fb6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx8_vdst_7eb33e>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_x :ref:`vdst<amdgpu_synid_gfx8_vdst_5d50a1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx8_vdst_d7c57e>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx8_vdst_a49b76>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx8_vdst_f47754>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx8_vdata_aeb804>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx8_vdata_f2bf57>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx8_vdata_4f639e>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx8_vdata_886702>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_x :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx8_vdata_56f215>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx8_vdata_e016a1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
MUBUF
------------------------
+-----
.. parsed-literal::
- **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- buffer_atomic_add :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_add_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_and :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_and_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_cmpswap_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_14>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_dec :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_dec_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_inc :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_inc_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_or :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_or_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smax :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smax_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smin :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smin_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_sub :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_sub_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_swap :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_swap_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umax :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umax_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umin :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umin_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_xor :ref:`vdata<amdgpu_synid_gfx8_vdata_12>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_xor_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_13>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_dword :ref:`vdst<amdgpu_synid_gfx8_vdst_17>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx8_vdst_14>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx8_vdst_15>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx8_vdst_16>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx8_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx8_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx8_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx8_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_x :ref:`vdst<amdgpu_synid_gfx8_vdst_17>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx8_vdst_14>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx8_vdst_15>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx8_vdst_16>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_sbyte :ref:`vdst<amdgpu_synid_gfx8_vdst_17>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_sshort :ref:`vdst<amdgpu_synid_gfx8_vdst_17>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_ubyte :ref:`vdst<amdgpu_synid_gfx8_vdst_17>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_ushort :ref:`vdst<amdgpu_synid_gfx8_vdst_17>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_store_byte :ref:`vdata<amdgpu_synid_gfx8_vdata>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dword :ref:`vdata<amdgpu_synid_gfx8_vdata>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dwordx2 :ref:`vdata<amdgpu_synid_gfx8_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dwordx3 :ref:`vdata<amdgpu_synid_gfx8_vdata_3>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dwordx4 :ref:`vdata<amdgpu_synid_gfx8_vdata_2>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx8_vdata_8>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx8_vdata_9>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx8_vdata_10>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx8_vdata_11>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_x :ref:`vdata<amdgpu_synid_gfx8_vdata>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx8_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx8_vdata_3>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx8_vdata_2>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_lds_dword :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`lds<amdgpu_synid_lds>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_short :ref:`vdata<amdgpu_synid_gfx8_vdata>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_3>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ buffer_atomic_add :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_add_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_and :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_and_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`b32x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_cmpswap_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_87fb90>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`b64x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_dec :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_dec_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_inc :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_inc_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_or :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_or_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smax :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smax_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smin :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smin_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_sub :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_sub_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_swap :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_swap_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umax :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umax_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umin :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umin_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_xor :ref:`vdata<amdgpu_synid_gfx8_vdata_c61803>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_xor_x2 :ref:`vdata<amdgpu_synid_gfx8_vdata_b2a787>`::ref:`dst<amdgpu_synid_gfx8_dst>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_dword :ref:`vdst<amdgpu_synid_gfx8_vdst_875645>`::ref:`opt<amdgpu_synid_gfx8_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx8_vdst_d7c57e>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx8_vdst_a49b76>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx8_vdst_f47754>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx8_vdst_d85497>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx8_vdst_3c54c3>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx8_vdst_3c6fb6>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx8_vdst_7eb33e>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_x :ref:`vdst<amdgpu_synid_gfx8_vdst_875645>`::ref:`opt<amdgpu_synid_gfx8_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx8_vdst_d7c57e>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx8_vdst_a49b76>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx8_vdst_f47754>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_sbyte :ref:`vdst<amdgpu_synid_gfx8_vdst_875645>`::ref:`opt<amdgpu_synid_gfx8_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_load_sshort :ref:`vdst<amdgpu_synid_gfx8_vdst_875645>`::ref:`opt<amdgpu_synid_gfx8_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_load_ubyte :ref:`vdst<amdgpu_synid_gfx8_vdst_875645>`::ref:`opt<amdgpu_synid_gfx8_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_load_ushort :ref:`vdst<amdgpu_synid_gfx8_vdst_875645>`::ref:`opt<amdgpu_synid_gfx8_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_store_byte :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dword :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dwordx2 :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dwordx3 :ref:`vdata<amdgpu_synid_gfx8_vdata_56f215>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dwordx4 :ref:`vdata<amdgpu_synid_gfx8_vdata_e016a1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx8_vdata_aeb804>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx8_vdata_f2bf57>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx8_vdata_4f639e>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx8_vdata_886702>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_x :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx8_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx8_vdata_56f215>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx8_vdata_e016a1>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_lds_dword :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`lds<amdgpu_synid_lds>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_short :ref:`vdata<amdgpu_synid_gfx8_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_abb420>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
buffer_wbinvl1
buffer_wbinvl1_vol
SMEM
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_atc_probe :ref:`probe<amdgpu_synid_gfx8_probe>`, :ref:`sbase<amdgpu_synid_gfx8_sbase>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>`
- s_atc_probe_buffer :ref:`probe<amdgpu_synid_gfx8_probe>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>`
- s_buffer_load_dword :ref:`sdst<amdgpu_synid_gfx8_sdst>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx8_sdst_1>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx8_sdst_3>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx8_sdst_4>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dword :ref:`sdata<amdgpu_synid_gfx8_sdata>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx8_sdata_1>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx8_sdata_2>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
+ s_atc_probe :ref:`probe<amdgpu_synid_gfx8_probe>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>`
+ s_atc_probe_buffer :ref:`probe<amdgpu_synid_gfx8_probe>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>`
+ s_buffer_load_dword :ref:`sdst<amdgpu_synid_gfx8_sdst_78579b>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx8_sdst_313759>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx8_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx8_sdst_362c37>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dword :ref:`sdata<amdgpu_synid_gfx8_sdata_c8788e>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_499d5b>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx8_sdata_e587f5>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_499d5b>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx8_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_499d5b>` :ref:`glc<amdgpu_synid_glc>`
s_dcache_inv
s_dcache_inv_vol
s_dcache_wb
s_dcache_wb_vol
- s_load_dword :ref:`sdst<amdgpu_synid_gfx8_sdst>`, :ref:`sbase<amdgpu_synid_gfx8_sbase>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx8_sdst_1>`, :ref:`sbase<amdgpu_synid_gfx8_sbase>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`sbase<amdgpu_synid_gfx8_sbase>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx8_sdst_3>`, :ref:`sbase<amdgpu_synid_gfx8_sbase>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx8_sdst_4>`, :ref:`sbase<amdgpu_synid_gfx8_sbase>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_memrealtime :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`::ref:`b64<amdgpu_synid_gfx8_type_deviation>`
- s_memtime :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`::ref:`b64<amdgpu_synid_gfx8_type_deviation>`
- s_store_dword :ref:`sdata<amdgpu_synid_gfx8_sdata>`, :ref:`sbase<amdgpu_synid_gfx8_sbase>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx8_sdata_1>`, :ref:`sbase<amdgpu_synid_gfx8_sbase>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx8_sdata_2>`, :ref:`sbase<amdgpu_synid_gfx8_sbase>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dword :ref:`sdst<amdgpu_synid_gfx8_sdst_78579b>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx8_sdst_313759>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx8_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx8_sdst_362c37>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_ac5750>` :ref:`glc<amdgpu_synid_glc>`
+ s_memrealtime :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`::ref:`b64<amdgpu_synid_gfx8_type_deviation>`
+ s_memtime :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`::ref:`b64<amdgpu_synid_gfx8_type_deviation>`
+ s_store_dword :ref:`sdata<amdgpu_synid_gfx8_sdata_c8788e>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_499d5b>` :ref:`glc<amdgpu_synid_glc>`
+ s_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx8_sdata_e587f5>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_499d5b>` :ref:`glc<amdgpu_synid_glc>`
+ s_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx8_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx8_sbase_589eed>`, :ref:`soffset<amdgpu_synid_gfx8_soffset_499d5b>` :ref:`glc<amdgpu_synid_glc>`
SOP1
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_abs_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_and_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_andn2_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_bcnt0_i32_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_bcnt0_i32_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_bcnt1_i32_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_bcnt1_i32_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_bitset0_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_bitset0_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- s_bitset1_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_bitset1_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- s_brev_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_brev_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_cbranch_join :ref:`ssrc<amdgpu_synid_gfx8_ssrc_2>`
- s_cmov_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_cmov_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_ff0_i32_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_ff0_i32_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_ff1_i32_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_ff1_i32_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_flbit_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_flbit_i32_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_flbit_i32_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_flbit_i32_i64 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_getpc_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`
- s_mov_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_mov_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_movreld_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_movreld_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_movrels_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_2>`
- s_movrels_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_3>`
- s_nand_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_nor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_not_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_not_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_or_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_orn2_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_quadmask_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_quadmask_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_rfe_b64 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_3>`
- s_set_gpr_idx_idx :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_setpc_b64 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_3>`
- s_sext_i32_i16 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_sext_i32_i8 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_swappc_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_3>`
- s_wqm_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`
- s_wqm_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_xnor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
- s_xor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_1>`
+ s_abs_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_and_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_andn2_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_bcnt0_i32_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_bcnt0_i32_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_bcnt1_i32_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_bcnt1_i32_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_bitset0_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_bitset0_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ s_bitset1_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_bitset1_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ s_brev_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_brev_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_cbranch_join :ref:`ssrc<amdgpu_synid_gfx8_ssrc_c8788e>`
+ s_cmov_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmov_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_ff0_i32_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_ff0_i32_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_ff1_i32_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_ff1_i32_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_flbit_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_flbit_i32_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_flbit_i32_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_flbit_i32_i64 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_getpc_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`
+ s_mov_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_mov_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_movreld_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_78579b>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_movreld_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_movrels_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_c8788e>`
+ s_movrels_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_e587f5>`
+ s_nand_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_nor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_not_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_not_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_or_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_orn2_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_quadmask_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_quadmask_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_rfe_b64 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_e587f5>`
+ s_set_gpr_idx_idx :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_setpc_b64 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_e587f5>`
+ s_sext_i32_i16 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_sext_i32_i8 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_swappc_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_e587f5>`
+ s_wqm_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_wqm_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_xnor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_xor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6706dc>`
SOP2
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_abs
diff _i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_add_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_add_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_addc_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_and_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_and_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
- s_andn2_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_andn2_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
- s_ashr_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_ashr_i64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_bfe_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_bfe_i64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_bfe_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_bfe_u64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_bfm_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_bfm_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- s_cbranch_g_fork :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_4>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_4>`
- s_cselect_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cselect_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
- s_lshl_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_lshl_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_lshr_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_lshr_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_max_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_max_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_min_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_min_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_mul_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_nand_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_nand_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
- s_nor_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_nor_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
- s_or_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_or_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
- s_orn2_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_orn2_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
- s_rfe_restore_b64 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- s_sub_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_sub_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_subb_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_xnor_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_xnor_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
- s_xor_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_xor_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
+ s_abs
diff _i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_add_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_add_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_addc_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_and_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_and_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_andn2_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_andn2_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_ashr_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_ashr_i64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_bfe_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_bfe_i64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_bfe_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_bfe_u64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_bfm_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_bfm_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ s_cbranch_g_fork :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_a2142e>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_a2142e>`
+ s_cselect_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cselect_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_lshl_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_lshl_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_lshr_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_lshr_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_max_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_max_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_min_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_min_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_mul_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_nand_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_nand_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_nor_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_nor_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_or_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_or_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_orn2_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_orn2_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_rfe_restore_b64 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ s_sub_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_sub_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_subb_u32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_xnor_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_xnor_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_xor_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_xor_b64 :ref:`sdst<amdgpu_synid_gfx8_sdst_6eddac>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
SOPC
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **SRC0** **SRC1**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_bitcmp0_b32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_bitcmp0_b64 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_bitcmp1_b32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_bitcmp1_b64 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- s_cmp_eq_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_eq_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_eq_u64 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
- s_cmp_ge_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_ge_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_gt_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_gt_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_le_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_le_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_lg_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_lg_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_lg_u64 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_1>`
- s_cmp_lt_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_cmp_lt_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
- s_set_gpr_idx_on :ref:`ssrc<amdgpu_synid_gfx8_ssrc>`, :ref:`imask<amdgpu_synid_gfx8_imask>`
- s_setvskip :ref:`ssrc0<amdgpu_synid_gfx8_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc>`
+ s_bitcmp0_b32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_bitcmp0_b64 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_bitcmp1_b32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_bitcmp1_b64 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ s_cmp_eq_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_eq_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_eq_u64 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_cmp_ge_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_ge_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_gt_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_gt_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_le_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_le_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_lg_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_lg_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_lg_u64 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_6706dc>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_6706dc>`
+ s_cmp_lt_i32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_cmp_lt_u32 :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
+ s_set_gpr_idx_on :ref:`ssrc<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`imask<amdgpu_synid_gfx8_imask>`
+ s_setvskip :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_f308b1>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f308b1>`
SOPK
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_addk_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`imm16<amdgpu_synid_gfx8_imm16>`
- s_cbranch_i_fork :ref:`ssrc<amdgpu_synid_gfx8_ssrc_5>`, :ref:`label<amdgpu_synid_gfx8_label>`
- s_cmovk_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`imm16<amdgpu_synid_gfx8_imm16>`
- s_cmpk_eq_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16>`
- s_cmpk_eq_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_1>`
- s_cmpk_ge_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16>`
- s_cmpk_ge_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_1>`
- s_cmpk_gt_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16>`
- s_cmpk_gt_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_1>`
- s_cmpk_le_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16>`
- s_cmpk_le_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_1>`
- s_cmpk_lg_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16>`
- s_cmpk_lg_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_1>`
- s_cmpk_lt_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16>`
- s_cmpk_lt_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_1>`
- s_getreg_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`hwreg<amdgpu_synid_gfx8_hwreg>`
- s_movk_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`imm16<amdgpu_synid_gfx8_imm16>`
- s_mulk_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_5>`, :ref:`imm16<amdgpu_synid_gfx8_imm16>`
- s_setreg_b32 :ref:`hwreg<amdgpu_synid_gfx8_hwreg>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_6>`
- s_setreg_imm32_b32 :ref:`hwreg<amdgpu_synid_gfx8_hwreg>`, :ref:`simm32<amdgpu_synid_gfx8_simm32>`
+ s_addk_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_cbranch_i_fork :ref:`ssrc<amdgpu_synid_gfx8_ssrc_0eec95>`, :ref:`label<amdgpu_synid_gfx8_label>`
+ s_cmovk_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_cmpk_eq_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_cmpk_eq_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_a04fb3>`
+ s_cmpk_ge_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_cmpk_ge_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_a04fb3>`
+ s_cmpk_gt_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_cmpk_gt_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_a04fb3>`
+ s_cmpk_le_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_cmpk_le_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_a04fb3>`
+ s_cmpk_lg_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_cmpk_lg_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_a04fb3>`
+ s_cmpk_lt_i32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_cmpk_lt_u32 :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_a04fb3>`
+ s_getreg_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`hwreg<amdgpu_synid_gfx8_hwreg>`
+ s_movk_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_mulk_i32 :ref:`sdst<amdgpu_synid_gfx8_sdst_1cf20d>`, :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_setreg_b32 :ref:`hwreg<amdgpu_synid_gfx8_hwreg>`, :ref:`ssrc<amdgpu_synid_gfx8_ssrc_133cbc>`
+ s_setreg_imm32_b32 :ref:`hwreg<amdgpu_synid_gfx8_hwreg>`, :ref:`simm32<amdgpu_synid_gfx8_simm32_a3e80c>`
SOPP
------------------------
+----
.. parsed-literal::
@@ -644,1123 +644,1123 @@ SOPP
s_cbranch_scc1 :ref:`label<amdgpu_synid_gfx8_label>`
s_cbranch_vccnz :ref:`label<amdgpu_synid_gfx8_label>`
s_cbranch_vccz :ref:`label<amdgpu_synid_gfx8_label>`
- s_decperflevel :ref:`imm16<amdgpu_synid_gfx8_imm16_2>`
+ s_decperflevel :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
s_endpgm
s_endpgm_saved
s_icache_inv
- s_incperflevel :ref:`imm16<amdgpu_synid_gfx8_imm16_2>`
- s_nop :ref:`imm16<amdgpu_synid_gfx8_imm16_2>`
+ s_incperflevel :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_nop :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
s_sendmsg :ref:`msg<amdgpu_synid_gfx8_msg>`
s_sendmsghalt :ref:`msg<amdgpu_synid_gfx8_msg>`
s_set_gpr_idx_mode :ref:`imask<amdgpu_synid_gfx8_imask>`
s_set_gpr_idx_off
- s_sethalt :ref:`imm16<amdgpu_synid_gfx8_imm16_2>`
- s_setkill :ref:`imm16<amdgpu_synid_gfx8_imm16_2>`
- s_setprio :ref:`imm16<amdgpu_synid_gfx8_imm16_2>`
- s_sleep :ref:`imm16<amdgpu_synid_gfx8_imm16_2>`
- s_trap :ref:`imm16<amdgpu_synid_gfx8_imm16_2>`
+ s_sethalt :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_setkill :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_setprio :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_sleep :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
+ s_trap :ref:`imm16<amdgpu_synid_gfx8_imm16_73139a>`
s_ttracedata
s_waitcnt :ref:`waitcnt<amdgpu_synid_gfx8_waitcnt>`
s_wakeup
VINTRP
------------------------
+------
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_interp_mov_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`param<amdgpu_synid_gfx8_param>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_interp_p1_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_interp_p2_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_interp_mov_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`param<amdgpu_synid_gfx8_param>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_interp_p1_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_interp_p2_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
VOP1
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_bfrev_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_bfrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ceil_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_ceil_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ceil_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ceil_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_ceil_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ceil_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ceil_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
+ v_bfrev_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_bfrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ceil_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_ceil_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ceil_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ceil_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_ceil_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ceil_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ceil_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
v_clrexcp
- v_cos_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cos_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cos_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cos_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cos_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cos_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f16_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_f16_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f16_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f16_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_2>`
- v_cvt_f16_i16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f16_i16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f16_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_2>`
- v_cvt_f16_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f16_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_cvt_f32_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_f32_i32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_i32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_f32_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte0 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_f32_ubyte0_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_ubyte0_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte1 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_f32_ubyte1_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_ubyte1_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte2 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_f32_ubyte2_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_ubyte2_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte3 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_f32_ubyte3_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_ubyte3_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f64_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_f64_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_f64_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_flr_i32_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_flr_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_flr_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_i16_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_i32_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_i32_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_cvt_off_f32_i4 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_off_f32_i4_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_off_f32_i4_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_rpi_i32_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_rpi_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_rpi_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_u16_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_u32_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_cvt_u32_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_u32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_u32_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_exp_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_exp_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_exp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_exp_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_exp_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_exp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_exp_legacy_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_exp_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_exp_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ffbh_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_ffbh_i32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ffbh_i32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ffbh_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_ffbh_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ffbh_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ffbl_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_ffbl_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ffbl_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_floor_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_floor_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_floor_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_floor_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_floor_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_floor_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_floor_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_fract_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_fract_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_fract_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_fract_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_fract_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_fract_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_fract_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_frexp_exp_i16_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_frexp_exp_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_frexp_exp_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_exp_i32_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_frexp_exp_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_frexp_exp_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_exp_i32_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_frexp_mant_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_frexp_mant_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_frexp_mant_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_mant_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_frexp_mant_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_frexp_mant_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_mant_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_log_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_log_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_log_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_log_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_log_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_log_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_log_legacy_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_log_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_log_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_mov_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_mov_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mov_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cos_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cos_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cos_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cos_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cos_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cos_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f16_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_f16_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f16_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f16_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_8a6ea8>`
+ v_cvt_f16_i16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f16_i16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f16_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_8a6ea8>`
+ v_cvt_f16_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f16_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_cvt_f32_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_f32_i32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_i32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_f32_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte0 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_f32_ubyte0_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_ubyte0_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte1 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_f32_ubyte1_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_ubyte1_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte2 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_f32_ubyte2_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_ubyte2_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte3 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_f32_ubyte3_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_ubyte3_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f64_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_f64_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_f64_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_flr_i32_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_flr_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_flr_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_i16_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_i32_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_i32_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_cvt_off_f32_i4 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_off_f32_i4_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_off_f32_i4_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_rpi_i32_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_rpi_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_rpi_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_u16_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_u32_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_cvt_u32_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_u32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_u32_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_exp_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_exp_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_exp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_exp_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_exp_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_exp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_exp_legacy_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_exp_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_exp_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ffbh_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_ffbh_i32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ffbh_i32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ffbh_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_ffbh_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ffbh_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ffbl_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_ffbl_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ffbl_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_floor_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_floor_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_floor_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_floor_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_floor_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_floor_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_floor_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_fract_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_fract_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_fract_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_fract_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_fract_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_fract_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_fract_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_frexp_exp_i16_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_frexp_exp_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_frexp_exp_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_exp_i32_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_frexp_exp_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_frexp_exp_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_exp_i32_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_frexp_mant_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_frexp_mant_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_frexp_mant_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_mant_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_frexp_mant_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_frexp_mant_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_mant_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_log_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_log_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_log_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_log_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_log_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_log_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_log_legacy_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_log_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_log_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_mov_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_mov_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mov_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
v_nop
- v_not_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_not_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_not_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rcp_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_rcp_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rcp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rcp_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_rcp_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rcp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rcp_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rcp_iflag_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_readfirstlane_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_7>`, :ref:`src<amdgpu_synid_gfx8_src_3>`
- v_rndne_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_rndne_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rndne_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rndne_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_rndne_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rndne_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rndne_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_rsq_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_rsq_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rsq_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rsq_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_rsq_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rsq_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rsq_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_sin_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_sin_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sin_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sin_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_sin_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sin_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sqrt_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_sqrt_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sqrt_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sqrt_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_sqrt_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sqrt_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sqrt_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
- v_trunc_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_trunc_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_trunc_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_trunc_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src>`
- v_trunc_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_trunc_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_trunc_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_1>`
+ v_not_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_not_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_not_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rcp_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_rcp_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rcp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rcp_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_rcp_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rcp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rcp_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rcp_iflag_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_readfirstlane_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_8d900a>`, :ref:`src<amdgpu_synid_gfx8_src_516946>`
+ v_rndne_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_rndne_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rndne_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rndne_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_rndne_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rndne_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rndne_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_rsq_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_rsq_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rsq_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rsq_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_rsq_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rsq_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rsq_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_sin_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_sin_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sin_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sin_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_sin_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sin_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sqrt_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_sqrt_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sqrt_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sqrt_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_sqrt_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sqrt_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sqrt_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
+ v_trunc_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_trunc_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_trunc_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_trunc_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_2dcf49>`
+ v_trunc_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_trunc_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_trunc_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_67227c>`
VOP2
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
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- v_add_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_add_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_add_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_add_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_add_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_add_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_add_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_add_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_add_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_add_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_add_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_add_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_addc_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`
- v_addc_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_addc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_and_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_and_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_and_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_4>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_ashrrev_i16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ashrrev_i16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_ashrrev_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_5>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cndmask_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`
- v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cndmask_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_ldexp_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`i16<amdgpu_synid_gfx8_type_deviation>`
- v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`i16<amdgpu_synid_gfx8_type_deviation>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ldexp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`i16<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_4>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_lshlrev_b16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_lshlrev_b16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_lshlrev_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_5>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_4>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_lshrrev_b16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_lshrrev_b16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_lshrrev_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_5>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mac_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_mac_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mac_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mac_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mac_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_madak_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`, :ref:`simm32<amdgpu_synid_gfx8_simm32_1>`
- v_madak_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`, :ref:`simm32<amdgpu_synid_gfx8_simm32_2>`
- v_madmk_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`simm32<amdgpu_synid_gfx8_simm32_1>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_1>`
- v_madmk_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`simm32<amdgpu_synid_gfx8_simm32_2>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_1>`
- v_max_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_max_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_max_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_max_i16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_i16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_max_i32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_i32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_max_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_max_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_min_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_min_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_min_i16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_i16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_min_i32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_i32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_min_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_min_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_mul_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_mul_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_hi_i32_i24 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_mul_hi_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_hi_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_hi_u32_u24 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_mul_hi_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_hi_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_i32_i24 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_mul_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_legacy_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_mul_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_mul_lo_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_lo_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_u32_u24 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_mul_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_or_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_or_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_or_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_sub_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sub_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_sub_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sub_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_sub_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sub_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_sub_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sub_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subb_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`
- v_subb_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subb_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subbrev_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_5>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`
- v_subbrev_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subbrev_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_5>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_subrev_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_5>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_subrev_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_subrev_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subrev_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_5>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_subrev_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subrev_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_xor_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_xor_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_xor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_add_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_add_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_add_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_add_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_add_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_add_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_add_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_add_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_addc_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`
+ v_addc_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_addc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_and_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_and_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_and_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_021c9b>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_ashrrev_i16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ashrrev_i16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_ashrrev_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_a13aeb>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cndmask_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`
+ v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cndmask_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_ldexp_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`i16<amdgpu_synid_gfx8_type_deviation>`
+ v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`i16<amdgpu_synid_gfx8_type_deviation>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ldexp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`i16<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_021c9b>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_lshlrev_b16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_lshlrev_b16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_lshlrev_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_a13aeb>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_021c9b>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_lshrrev_b16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_lshrrev_b16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_lshrrev_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_a13aeb>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mac_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_mac_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mac_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mac_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mac_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_madak_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`simm32<amdgpu_synid_gfx8_simm32_be0c1c>`
+ v_madak_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`simm32<amdgpu_synid_gfx8_simm32_6f0844>`
+ v_madmk_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`simm32<amdgpu_synid_gfx8_simm32_be0c1c>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_madmk_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`simm32<amdgpu_synid_gfx8_simm32_6f0844>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_max_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_max_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_max_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_max_i16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_i16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_max_i32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_i32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_max_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_max_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_min_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_min_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_min_i16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_i16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_min_i32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_i32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_min_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_min_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_mul_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_mul_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_hi_i32_i24 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_mul_hi_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_hi_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_hi_u32_u24 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_mul_hi_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_hi_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_i32_i24 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_mul_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_legacy_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_mul_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_mul_lo_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_lo_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_u32_u24 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_mul_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_or_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_or_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_or_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_sub_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sub_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_sub_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sub_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_sub_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sub_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_sub_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sub_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subb_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`
+ v_subb_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subb_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subbrev_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_a13aeb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`
+ v_subbrev_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subbrev_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_a13aeb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_subrev_f16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_a13aeb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_subrev_f32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_021c9b>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_subrev_u16_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subrev_u16_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_a13aeb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_subrev_u32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subrev_u32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_xor_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_xor_b32_dpp :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>` :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_xor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
VOP3
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_add_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_add_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_add_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_add_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>` :ref:`clamp<amdgpu_synid_clamp>`
- v_addc_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`ssrc2<amdgpu_synid_gfx8_ssrc_3>` :ref:`clamp<amdgpu_synid_clamp>`
- v_alignbit_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_alignbyte_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_and_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_ashrrev_i16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_10>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_ashrrev_i64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_bfe_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- v_bfe_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_bfi_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_bfm_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`
- v_ceil_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ceil_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ceil_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_add_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_addc_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`ssrc2<amdgpu_synid_gfx8_ssrc_e587f5>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_alignbit_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_alignbyte_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_and_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_ashrrev_i16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_b38805>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_ashrrev_i64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_bfe_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ v_bfe_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_bfi_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_bfm_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`
+ v_ceil_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ceil_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ceil_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
v_clrexcp_e64
- v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_f_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_t_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_t_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmpx_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmpx_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmpx_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_f_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_t_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_t_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_cmpx_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_cmpx_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_cmpx_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`ssrc2<amdgpu_synid_gfx8_ssrc_3>`
- v_cos_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cos_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubeid_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubema_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubesc_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubetc_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_9>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_9>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_6>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_6>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`
- v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- v_cvt_pkaccum_u8_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
- v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`
- v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`
- v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`
- v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_div_fixup_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fixup_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fixup_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fmas_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fmas_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_scale_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_div_scale_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`, :ref:`src2<amdgpu_synid_gfx8_src_8>`
- v_exp_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_exp_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_exp_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`
- v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`
- v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`
- v_floor_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_floor_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_floor_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fma_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fma_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fma_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fract_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fract_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fract_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`
- v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_interp_mov_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`param<amdgpu_synid_gfx8_param>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_interp_p1_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_interp_p1ll_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_interp_p1lv_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f16x2<amdgpu_synid_gfx8_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_interp_p2_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
- v_interp_p2_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`i16<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ldexp_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ldexp_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_lerp_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_log_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_log_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_log_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_lshlrev_b16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_10>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_lshlrev_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_lshrrev_b16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_10>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_lshrrev_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`
- v_mac_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mac_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`, :ref:`src2<amdgpu_synid_gfx8_src_10>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i32_i24 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i64_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_8>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_legacy_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`, :ref:`src2<amdgpu_synid_gfx8_src_10>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u32_u24 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u64_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_8>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max3_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_max3_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_max_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max_i16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_max_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_max_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_max_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_med3_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_med3_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_med3_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_min3_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min3_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_min3_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_min_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min_i16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_min_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_min_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_min_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_mov_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`
- v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`::ref:`u16x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`u8x8<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_8>`::ref:`u16x4<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_2>`::ref:`u32x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`u8x8<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_2>`::ref:`u32x4<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_msad_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_hi_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_mul_hi_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_lo_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>`
- v_mul_lo_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_f_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_f_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_t_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_t_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmpx_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmpx_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmpx_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_f_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_f_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_t_i16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_t_u16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_cmpx_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_cmpx_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_cmpx_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`ssrc2<amdgpu_synid_gfx8_ssrc_e587f5>`
+ v_cos_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cos_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubeid_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubema_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubesc_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubetc_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_87dc5c>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_87dc5c>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>`
+ v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ v_cvt_pkaccum_u8_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`
+ v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`
+ v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`
+ v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`
+ v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_div_fixup_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fixup_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fixup_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fmas_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fmas_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_scale_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_div_scale_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`, :ref:`src2<amdgpu_synid_gfx8_src_39a989>`
+ v_exp_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_exp_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_exp_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`
+ v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`
+ v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`
+ v_floor_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_floor_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_floor_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fma_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fma_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fma_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fract_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fract_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fract_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`
+ v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_interp_mov_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`param<amdgpu_synid_gfx8_param>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_interp_p1_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_interp_p1ll_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_interp_p1lv_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f16x2<amdgpu_synid_gfx8_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_interp_p2_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`::ref:`f32<amdgpu_synid_gfx8_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_interp_p2_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`attr<amdgpu_synid_gfx8_attr>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`i16<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ldexp_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ldexp_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_lerp_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_log_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_log_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_log_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_lshlrev_b16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_b38805>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_lshlrev_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_lshrrev_b16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_b38805>`::ref:`u16<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_lshrrev_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`
+ v_mac_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mac_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_f16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_i16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`, :ref:`src2<amdgpu_synid_gfx8_src_b38805>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_i32_i24 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`i32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_i64_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_39a989>`::ref:`i64<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_legacy_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`, :ref:`src2<amdgpu_synid_gfx8_src_b38805>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_u32_u24 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_u64_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_39a989>`::ref:`u64<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_max3_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max3_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_max3_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_max_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max_i16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_max_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_max_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_max_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_med3_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_med3_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_med3_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_min3_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min3_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_min3_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_min_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min_i16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_min_i32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_min_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_min_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_mov_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`
+ v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`::ref:`u16x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`u8x8<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_39a989>`::ref:`u16x4<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_69a144>`::ref:`u32x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`u8x8<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx8_vsrc_e016a1>`::ref:`u32x4<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_msad_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mul_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_hi_i32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_mul_hi_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_lo_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>`
+ v_mul_lo_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>` :ref:`clamp<amdgpu_synid_clamp>`
v_nop_e64
- v_not_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`
- v_or_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
- v_perm_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`
- v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`::ref:`u16x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`u8x8<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_8>`::ref:`u16x4<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rcp_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rcp_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rcp_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_readlane_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_7>`, :ref:`src0<amdgpu_synid_gfx8_src_3>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_7>`
- v_rndne_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rndne_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rndne_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rsq_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rsq_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rsq_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sad_hi_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`u16x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u16x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`src2<amdgpu_synid_gfx8_src_7>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sin_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sin_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sub_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sub_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sub_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_9>`, :ref:`src1<amdgpu_synid_gfx8_src_10>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subb_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`ssrc2<amdgpu_synid_gfx8_ssrc_3>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subbrev_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_7>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`, :ref:`ssrc2<amdgpu_synid_gfx8_ssrc_3>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_subrev_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_subrev_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_10>`, :ref:`src1<amdgpu_synid_gfx8_src_10>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_2>`, :ref:`src0<amdgpu_synid_gfx8_src_7>`, :ref:`src1<amdgpu_synid_gfx8_src_7>` :ref:`clamp<amdgpu_synid_clamp>`
- v_trig_preop_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src0<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_trunc_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_trunc_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src<amdgpu_synid_gfx8_src_6>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_trunc_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_1>`, :ref:`src<amdgpu_synid_gfx8_src_8>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_writelane_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_8>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_7>`
- v_xor_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst>`, :ref:`src0<amdgpu_synid_gfx8_src_6>`, :ref:`src1<amdgpu_synid_gfx8_src_7>`
+ v_not_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`
+ v_or_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
+ v_perm_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`
+ v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`::ref:`u16x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`u8x8<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_39a989>`::ref:`u16x4<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_rcp_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rcp_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rcp_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_readlane_b32 :ref:`sdst<amdgpu_synid_gfx8_sdst_8d900a>`, :ref:`src0<amdgpu_synid_gfx8_src_516946>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f48190>`
+ v_rndne_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rndne_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rndne_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rsq_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rsq_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rsq_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sad_hi_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sad_u16 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`u16x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u16x2<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sad_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sad_u8 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u8x4<amdgpu_synid_gfx8_type_deviation>`, :ref:`src2<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sin_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sin_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sub_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sub_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sub_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_87dc5c>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sub_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subb_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`ssrc2<amdgpu_synid_gfx8_ssrc_e587f5>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subbrev_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`, :ref:`ssrc2<amdgpu_synid_gfx8_ssrc_e587f5>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subrev_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_subrev_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_subrev_u16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_b38805>`, :ref:`src1<amdgpu_synid_gfx8_src_b38805>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subrev_u32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx8_sdst_61db0e>`, :ref:`src0<amdgpu_synid_gfx8_src_d9175b>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_trig_preop_f64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`::ref:`u32<amdgpu_synid_gfx8_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_trunc_f16_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_trunc_f32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx8_src_df6b53>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_trunc_f64_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx8_src_39a989>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_writelane_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`ssrc0<amdgpu_synid_gfx8_ssrc_dcd0d4>`, :ref:`ssrc1<amdgpu_synid_gfx8_ssrc_f48190>`
+ v_xor_b32_e64 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx8_src_df6b53>`, :ref:`src1<amdgpu_synid_gfx8_src_d9175b>`
VOPC
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_cmp_class_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmp_class_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_class_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmp_class_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_class_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmp_eq_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_eq_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_eq_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_eq_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_eq_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_eq_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_eq_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_eq_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_eq_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_f_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_f_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_f_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_f_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_f_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_f_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_f_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_f_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_f_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_ge_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ge_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ge_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_ge_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ge_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ge_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_ge_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ge_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ge_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_gt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_gt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_gt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_gt_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_gt_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_gt_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_gt_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_gt_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_gt_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_le_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_le_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_le_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_le_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_le_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_le_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_le_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_le_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_le_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_lg_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_lg_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lg_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_lg_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lg_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_lt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_lt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_lt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_lt_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_lt_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_lt_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_lt_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_lt_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_lt_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_ne_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ne_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ne_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_ne_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ne_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ne_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_neq_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_neq_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_neq_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_neq_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_neq_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_nge_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_nge_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nge_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_nge_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nge_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_ngt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ngt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ngt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_ngt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ngt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_nle_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_nle_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nle_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_nle_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nle_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_nlg_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_nlg_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlg_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_nlg_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlg_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_nlt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_nlt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_nlt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_o_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_o_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_o_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_o_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_o_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_t_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_t_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_t_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_t_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_t_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_t_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_t_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_t_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_t_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_t_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_tru_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_tru_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_tru_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_tru_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_tru_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmp_u_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_u_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_u_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmp_u_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_u_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_class_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmpx_class_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_class_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmpx_class_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_class_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
- v_cmpx_eq_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_eq_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_eq_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_eq_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_eq_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_eq_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_eq_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_eq_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_eq_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_f_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_f_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_f_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_f_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_f_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_f_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_f_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_f_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_f_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_ge_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ge_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ge_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_ge_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ge_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ge_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_ge_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ge_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ge_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_gt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_gt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_gt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_gt_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_gt_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_gt_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_gt_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_gt_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_gt_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_le_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_le_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_le_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_le_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_le_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_le_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_le_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_le_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_le_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_lg_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_lg_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lg_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_lg_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lg_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_lt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_lt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_lt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_lt_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_lt_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_lt_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_lt_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_lt_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_lt_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_ne_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ne_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ne_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_ne_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ne_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ne_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_neq_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_neq_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_neq_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_neq_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_neq_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_nge_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_nge_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nge_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_nge_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nge_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_ngt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ngt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ngt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_ngt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ngt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_nle_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_nle_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nle_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_nle_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nle_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_nlg_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_nlg_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlg_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_nlg_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlg_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_nlt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_nlt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_nlt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_o_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_o_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_o_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_o_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_o_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_t_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_t_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_t_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_t_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_t_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_t_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_t_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_t_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_t_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_t_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_tru_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_tru_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_tru_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_tru_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_tru_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
- v_cmpx_u_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_u_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_u_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`
- v_cmpx_u_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_1>`::ref:`m<amdgpu_synid_gfx8_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_u_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_3>`
+ v_cmp_class_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmp_class_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_class_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmp_class_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_class_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmp_eq_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_eq_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_eq_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_eq_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_eq_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_eq_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_eq_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_eq_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_eq_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_f_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_f_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_f_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_f_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_f_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_f_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_f_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_f_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_f_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_ge_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ge_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ge_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_ge_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ge_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ge_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_ge_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ge_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ge_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_gt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_gt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_gt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_gt_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_gt_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_gt_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_gt_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_gt_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_gt_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_le_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_le_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_le_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_le_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_le_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_le_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_le_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_le_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_le_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_lg_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_lg_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lg_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_lg_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lg_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_lt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_lt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_lt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_lt_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_lt_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_lt_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_lt_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_lt_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_lt_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_ne_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ne_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ne_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_ne_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ne_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ne_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_neq_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_neq_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_neq_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_neq_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_neq_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_nge_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_nge_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nge_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_nge_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nge_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_ngt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ngt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ngt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_ngt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ngt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_nle_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_nle_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nle_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_nle_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nle_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_nlg_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_nlg_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlg_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_nlg_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlg_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_nlt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_nlt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_nlt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_o_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_o_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_o_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_o_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_o_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_t_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_t_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_t_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_t_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_t_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_t_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_t_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_t_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_t_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_t_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_tru_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_tru_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_tru_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_tru_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_tru_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmp_u_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_u_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_u_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmp_u_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_u_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_class_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmpx_class_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_class_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmpx_class_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_class_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx8_type_deviation>`
+ v_cmpx_eq_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_eq_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_eq_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_eq_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_eq_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_eq_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_eq_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_eq_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_eq_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_f_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_f_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_f_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_f_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_f_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_f_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_f_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_f_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_f_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_ge_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ge_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ge_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_ge_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ge_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ge_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_ge_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ge_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ge_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_gt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_gt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_gt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_gt_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_gt_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_gt_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_gt_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_gt_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_gt_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_le_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_le_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_le_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_le_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_le_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_le_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_le_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_le_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_le_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_lg_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_lg_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lg_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_lg_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lg_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_lt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_lt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_lt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_lt_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_lt_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_lt_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_lt_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_lt_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_lt_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_ne_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ne_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ne_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_ne_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ne_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ne_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_neq_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_neq_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_neq_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_neq_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_neq_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_nge_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_nge_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nge_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_nge_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nge_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_ngt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ngt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ngt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_ngt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ngt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_nle_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_nle_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nle_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_nle_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nle_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_nlg_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_nlg_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlg_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_nlg_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlg_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_nlt_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_nlt_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlt_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_nlt_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlt_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_o_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_o_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_o_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_o_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_o_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_t_i16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_t_i16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_t_i32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_t_i32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_t_i64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_t_u16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_8a6ea8>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_t_u16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_t_u32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_t_u32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_t_u64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_tru_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_tru_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_tru_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_tru_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_tru_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
+ v_cmpx_u_f16 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_u_f16_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_u_f32 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_2dcf49>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`
+ v_cmpx_u_f32_sdwa :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx8_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_u_f64 :ref:`vcc<amdgpu_synid_gfx8_vcc>`, :ref:`src0<amdgpu_synid_gfx8_src_67227c>`, :ref:`vsrc1<amdgpu_synid_gfx8_vsrc_fd235e>`
.. |---| unicode:: U+02014 .. em dash
@@ -1771,104 +1771,104 @@ VOPC
gfx8_dst
gfx8_hwreg
gfx8_imask
- gfx8_imm16
- gfx8_imm16_1
- gfx8_imm16_2
+ gfx8_imm16_73139a
+ gfx8_imm16_a04fb3
gfx8_label
- gfx8_m
- gfx8_m_1
+ gfx8_m_254bcb
+ gfx8_m_f5d306
gfx8_msg
- gfx8_opt
+ gfx8_opt_0d447d
+ gfx8_opt_847aed
gfx8_param
gfx8_probe
- gfx8_sbase
- gfx8_sbase_1
- gfx8_sdata
- gfx8_sdata_1
- gfx8_sdata_2
- gfx8_sdst
- gfx8_sdst_1
- gfx8_sdst_2
- gfx8_sdst_3
- gfx8_sdst_4
- gfx8_sdst_5
- gfx8_sdst_6
- gfx8_sdst_7
- gfx8_simm32
- gfx8_simm32_1
- gfx8_simm32_2
- gfx8_soffset
- gfx8_soffset_1
- gfx8_soffset_2
- gfx8_src
- gfx8_src_1
- gfx8_src_10
- gfx8_src_2
- gfx8_src_3
- gfx8_src_4
- gfx8_src_5
- gfx8_src_6
- gfx8_src_7
- gfx8_src_8
- gfx8_src_9
- gfx8_srsrc
- gfx8_srsrc_1
+ gfx8_sbase_010ce0
+ gfx8_sbase_589eed
+ gfx8_sdata_7cbd60
+ gfx8_sdata_c8788e
+ gfx8_sdata_e587f5
+ gfx8_sdst_0804b1
+ gfx8_sdst_1cf20d
+ gfx8_sdst_313759
+ gfx8_sdst_362c37
+ gfx8_sdst_61db0e
+ gfx8_sdst_6eddac
+ gfx8_sdst_78579b
+ gfx8_sdst_8d900a
+ gfx8_simm32_6f0844
+ gfx8_simm32_a3e80c
+ gfx8_simm32_be0c1c
+ gfx8_soffset_499d5b
+ gfx8_soffset_abb420
+ gfx8_soffset_ac5750
+ gfx8_src_021c9b
+ gfx8_src_2dcf49
+ gfx8_src_39a989
+ gfx8_src_516946
+ gfx8_src_67227c
+ gfx8_src_87dc5c
+ gfx8_src_8a6ea8
+ gfx8_src_a13aeb
+ gfx8_src_b38805
+ gfx8_src_d9175b
+ gfx8_src_df6b53
+ gfx8_srsrc_cf7132
+ gfx8_srsrc_e73d16
gfx8_ssamp
- gfx8_ssrc
- gfx8_ssrc_1
- gfx8_ssrc_2
- gfx8_ssrc_3
- gfx8_ssrc_4
- gfx8_ssrc_5
- gfx8_ssrc_6
- gfx8_ssrc_7
- gfx8_ssrc_8
+ gfx8_ssrc_0eec95
+ gfx8_ssrc_133cbc
+ gfx8_ssrc_6706dc
+ gfx8_ssrc_a2142e
+ gfx8_ssrc_c8788e
+ gfx8_ssrc_dcd0d4
+ gfx8_ssrc_e587f5
+ gfx8_ssrc_f308b1
+ gfx8_ssrc_f48190
gfx8_tgt
gfx8_type_deviation
- gfx8_vaddr
- gfx8_vaddr_1
- gfx8_vaddr_2
- gfx8_vaddr_3
+ gfx8_vaddr_9f7133
+ gfx8_vaddr_b73dc0
+ gfx8_vaddr_e9b690
+ gfx8_vaddr_f20ee4
gfx8_vcc
- gfx8_vdata
- gfx8_vdata0
- gfx8_vdata0_1
- gfx8_vdata1
- gfx8_vdata1_1
- gfx8_vdata_1
- gfx8_vdata_10
- gfx8_vdata_11
- gfx8_vdata_12
- gfx8_vdata_13
- gfx8_vdata_14
- gfx8_vdata_2
- gfx8_vdata_3
- gfx8_vdata_4
- gfx8_vdata_5
- gfx8_vdata_6
- gfx8_vdata_7
- gfx8_vdata_8
- gfx8_vdata_9
- gfx8_vdst
- gfx8_vdst_1
- gfx8_vdst_10
- gfx8_vdst_11
- gfx8_vdst_12
- gfx8_vdst_13
- gfx8_vdst_14
- gfx8_vdst_15
- gfx8_vdst_16
- gfx8_vdst_17
- gfx8_vdst_2
- gfx8_vdst_3
- gfx8_vdst_4
- gfx8_vdst_5
- gfx8_vdst_6
- gfx8_vdst_7
- gfx8_vdst_8
- gfx8_vdst_9
- gfx8_vsrc
- gfx8_vsrc_1
- gfx8_vsrc_2
- gfx8_vsrc_3
+ gfx8_vdata0_6802ce
+ gfx8_vdata0_fd235e
+ gfx8_vdata1_6802ce
+ gfx8_vdata1_fd235e
+ gfx8_vdata_325b78
+ gfx8_vdata_4d8ecf
+ gfx8_vdata_4f639e
+ gfx8_vdata_56f215
+ gfx8_vdata_6802ce
+ gfx8_vdata_87fb90
+ gfx8_vdata_886702
+ gfx8_vdata_a9eee3
+ gfx8_vdata_aeb804
+ gfx8_vdata_b2a787
+ gfx8_vdata_c08393
+ gfx8_vdata_c61803
+ gfx8_vdata_e016a1
+ gfx8_vdata_f2bf57
+ gfx8_vdata_fd235e
+ gfx8_vdst_0b9599
+ gfx8_vdst_3c54c3
+ gfx8_vdst_3c6fb6
+ gfx8_vdst_3d7dcf
+ gfx8_vdst_463513
+ gfx8_vdst_48e42f
+ gfx8_vdst_5d50a1
+ gfx8_vdst_69a144
+ gfx8_vdst_7eb33e
+ gfx8_vdst_875645
+ gfx8_vdst_89680f
+ gfx8_vdst_a49b76
+ gfx8_vdst_bdb32f
+ gfx8_vdst_d0dc43
+ gfx8_vdst_d7c57e
+ gfx8_vdst_d85497
+ gfx8_vdst_e0515f
+ gfx8_vdst_f47754
+ gfx8_vsrc_533a4e
+ gfx8_vsrc_6802ce
+ gfx8_vsrc_e016a1
+ gfx8_vsrc_fd235e
gfx8_waitcnt
diff --git a/llvm/docs/AMDGPU/gfx8_hwreg.rst b/llvm/docs/AMDGPU/gfx8_hwreg.rst
index c81af693497b..22cc81f4e820 100644
--- a/llvm/docs/AMDGPU/gfx8_hwreg.rst
+++ b/llvm/docs/AMDGPU/gfx8_hwreg.rst
@@ -41,17 +41,17 @@ or :ref:`absolute expressions<amdgpu_synid_absolute_expression>`.
Defined register *names* include:
- =================== ==========================================
- Name Description
- =================== ==========================================
- HW_REG_MODE Shader writeable mode bits.
- HW_REG_STATUS Shader read-only status.
- HW_REG_TRAPSTS Trap status.
- HW_REG_HW_ID Id of wave, simd, compute unit, etc.
- HW_REG_GPR_ALLOC Per-wave SGPR and VGPR allocation.
- HW_REG_LDS_ALLOC Per-wave LDS allocation.
- HW_REG_IB_STS Counters of outstanding instructions.
- =================== ==========================================
+ ============================== ==========================================
+ Name Description
+ ============================== ==========================================
+ HW_REG_MODE Shader writeable mode bits.
+ HW_REG_STATUS Shader read-only status.
+ HW_REG_TRAPSTS Trap status.
+ HW_REG_HW_ID Id of wave, simd, compute unit, etc.
+ HW_REG_GPR_ALLOC Per-wave SGPR and VGPR allocation.
+ HW_REG_LDS_ALLOC Per-wave LDS allocation.
+ HW_REG_IB_STS Counters of outstanding instructions.
+ ============================== ==========================================
Examples:
diff --git a/llvm/docs/AMDGPU/gfx8_imm16_2.rst b/llvm/docs/AMDGPU/gfx8_imm16_2.rst
deleted file mode 100644
index 591bc08e6a79..000000000000
--- a/llvm/docs/AMDGPU/gfx8_imm16_2.rst
+++ /dev/null
@@ -1,13 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx8_imm16_2:
-
-imm16
-=====
-
-A 16-bit :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
diff --git a/llvm/docs/AMDGPU/gfx8_imm16.rst b/llvm/docs/AMDGPU/gfx8_imm16_73139a.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx8_imm16.rst
rename to llvm/docs/AMDGPU/gfx8_imm16_73139a.rst
index 587faae4afaf..13e48226055e 100644
--- a/llvm/docs/AMDGPU/gfx8_imm16.rst
+++ b/llvm/docs/AMDGPU/gfx8_imm16_73139a.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_imm16:
+.. _amdgpu_synid_gfx8_imm16_73139a:
imm16
=====
diff --git a/llvm/docs/AMDGPU/gfx8_imm16_1.rst b/llvm/docs/AMDGPU/gfx8_imm16_a04fb3.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx8_imm16_1.rst
rename to llvm/docs/AMDGPU/gfx8_imm16_a04fb3.rst
index b3b62af003c1..606ca09f2fca 100644
--- a/llvm/docs/AMDGPU/gfx8_imm16_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_imm16_a04fb3.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_imm16_1:
+.. _amdgpu_synid_gfx8_imm16_a04fb3:
imm16
=====
diff --git a/llvm/docs/AMDGPU/gfx8_m.rst b/llvm/docs/AMDGPU/gfx8_m_254bcb.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx8_m.rst
rename to llvm/docs/AMDGPU/gfx8_m_254bcb.rst
index 43a066b3be7d..f10e9f90c366 100644
--- a/llvm/docs/AMDGPU/gfx8_m.rst
+++ b/llvm/docs/AMDGPU/gfx8_m_254bcb.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_m:
+.. _amdgpu_synid_gfx8_m_254bcb:
m
=
diff --git a/llvm/docs/AMDGPU/gfx8_m_1.rst b/llvm/docs/AMDGPU/gfx8_m_f5d306.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx8_m_1.rst
rename to llvm/docs/AMDGPU/gfx8_m_f5d306.rst
index be08cac1f30f..a4640e416fd5 100644
--- a/llvm/docs/AMDGPU/gfx8_m_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_m_f5d306.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_m_1:
+.. _amdgpu_synid_gfx8_m_f5d306:
m
=
diff --git a/llvm/docs/AMDGPU/gfx8_msg.rst b/llvm/docs/AMDGPU/gfx8_msg.rst
index ac27622dd577..5790e4014391 100644
--- a/llvm/docs/AMDGPU/gfx8_msg.rst
+++ b/llvm/docs/AMDGPU/gfx8_msg.rst
@@ -47,23 +47,23 @@ or :ref:`absolute expressions<amdgpu_synid_absolute_expression>`.
Each message type supports specific operations:
- ================= ========== ============================== ============ ==========
- Message name Message Id Supported Operations Operation Id Stream Id
- ================= ========== ============================== ============ ==========
- MSG_INTERRUPT 1 \- \- \-
- MSG_GS 2 GS_OP_CUT 1 Optional
- \ GS_OP_EMIT 2 Optional
- \ GS_OP_EMIT_CUT 3 Optional
- MSG_GS_DONE 3 GS_OP_NOP 0 \-
- \ GS_OP_CUT 1 Optional
- \ GS_OP_EMIT 2 Optional
- \ GS_OP_EMIT_CUT 3 Optional
- MSG_SAVEWAVE 4 \- \- \-
- MSG_SYSMSG 15 SYSMSG_OP_ECC_ERR_INTERRUPT 1 \-
- \ SYSMSG_OP_REG_RD 2 \-
- \ SYSMSG_OP_HOST_TRAP_ACK 3 \-
- \ SYSMSG_OP_TTRACE_PC 4 \-
- ================= ========== ============================== ============ ==========
+ ====================== ========== ============================== ============ ==========
+ Message name Message Id Supported Operations Operation Id Stream Id
+ ====================== ========== ============================== ============ ==========
+ MSG_INTERRUPT 1 \- \- \-
+ MSG_GS 2 GS_OP_CUT 1 Optional
+ \ GS_OP_EMIT 2 Optional
+ \ GS_OP_EMIT_CUT 3 Optional
+ MSG_GS_DONE 3 GS_OP_NOP 0 \-
+ \ GS_OP_CUT 1 Optional
+ \ GS_OP_EMIT 2 Optional
+ \ GS_OP_EMIT_CUT 3 Optional
+ MSG_SAVEWAVE 4 \- \- \-
+ MSG_SYSMSG 15 SYSMSG_OP_ECC_ERR_INTERRUPT 1 \-
+ \ SYSMSG_OP_REG_RD 2 \-
+ \ SYSMSG_OP_HOST_TRAP_ACK 3 \-
+ \ SYSMSG_OP_TTRACE_PC 4 \-
+ ====================== ========== ============================== ============ ==========
*Sendmsg* arguments are validated depending on how *type* value is specified:
diff --git a/llvm/docs/AMDGPU/gfx8_opt_0d447d.rst b/llvm/docs/AMDGPU/gfx8_opt_0d447d.rst
new file mode 100644
index 000000000000..6f40f008f9ef
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx8_opt_0d447d.rst
@@ -0,0 +1,13 @@
+..
+ **************************************************
+ * *
+ * Automatically generated file, do not edit! *
+ * *
+ **************************************************
+
+.. _amdgpu_synid_gfx8_opt_0d447d:
+
+opt
+===
+
+This is an optional operand. It must be used if and only if :ref:`lds<amdgpu_synid_lds>` is omitted.
diff --git a/llvm/docs/AMDGPU/gfx8_opt.rst b/llvm/docs/AMDGPU/gfx8_opt_847aed.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx8_opt.rst
rename to llvm/docs/AMDGPU/gfx8_opt_847aed.rst
index 2786b136d0a5..8fedd0674102 100644
--- a/llvm/docs/AMDGPU/gfx8_opt.rst
+++ b/llvm/docs/AMDGPU/gfx8_opt_847aed.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_opt:
+.. _amdgpu_synid_gfx8_opt_847aed:
opt
===
diff --git a/llvm/docs/AMDGPU/gfx8_sbase_1.rst b/llvm/docs/AMDGPU/gfx8_sbase_010ce0.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_sbase_1.rst
rename to llvm/docs/AMDGPU/gfx8_sbase_010ce0.rst
index ab238e443f1e..28cd3af1ea55 100644
--- a/llvm/docs/AMDGPU/gfx8_sbase_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_sbase_010ce0.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sbase_1:
+.. _amdgpu_synid_gfx8_sbase_010ce0:
sbase
=====
diff --git a/llvm/docs/AMDGPU/gfx8_sbase.rst b/llvm/docs/AMDGPU/gfx8_sbase_589eed.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_sbase.rst
rename to llvm/docs/AMDGPU/gfx8_sbase_589eed.rst
index d6b8c680df74..93412fa579b6 100644
--- a/llvm/docs/AMDGPU/gfx8_sbase.rst
+++ b/llvm/docs/AMDGPU/gfx8_sbase_589eed.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sbase:
+.. _amdgpu_synid_gfx8_sbase_589eed:
sbase
=====
diff --git a/llvm/docs/AMDGPU/gfx8_sdata_2.rst b/llvm/docs/AMDGPU/gfx8_sdata_7cbd60.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_sdata_2.rst
rename to llvm/docs/AMDGPU/gfx8_sdata_7cbd60.rst
index 31e4fbf852ef..a0a3d2d23f17 100644
--- a/llvm/docs/AMDGPU/gfx8_sdata_2.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdata_7cbd60.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdata_2:
+.. _amdgpu_synid_gfx8_sdata_7cbd60:
sdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_sdata.rst b/llvm/docs/AMDGPU/gfx8_sdata_c8788e.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_sdata.rst
rename to llvm/docs/AMDGPU/gfx8_sdata_c8788e.rst
index 95925242a86a..398ea36f5cd9 100644
--- a/llvm/docs/AMDGPU/gfx8_sdata.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdata_c8788e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdata:
+.. _amdgpu_synid_gfx8_sdata_c8788e:
sdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_sdata_1.rst b/llvm/docs/AMDGPU/gfx8_sdata_e587f5.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_sdata_1.rst
rename to llvm/docs/AMDGPU/gfx8_sdata_e587f5.rst
index 5155ae6029fb..af6966f15708 100644
--- a/llvm/docs/AMDGPU/gfx8_sdata_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdata_e587f5.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdata_1:
+.. _amdgpu_synid_gfx8_sdata_e587f5:
sdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_sdst_3.rst b/llvm/docs/AMDGPU/gfx8_sdst_0804b1.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_sdst_3.rst
rename to llvm/docs/AMDGPU/gfx8_sdst_0804b1.rst
index 2ea72e09fa80..1f4c823b1fb9 100644
--- a/llvm/docs/AMDGPU/gfx8_sdst_3.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdst_0804b1.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdst_3:
+.. _amdgpu_synid_gfx8_sdst_0804b1:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_sdst_5.rst b/llvm/docs/AMDGPU/gfx8_sdst_1cf20d.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_sdst_5.rst
rename to llvm/docs/AMDGPU/gfx8_sdst_1cf20d.rst
index afed75ef9ed9..7dab5cd88de1 100644
--- a/llvm/docs/AMDGPU/gfx8_sdst_5.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdst_1cf20d.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdst_5:
+.. _amdgpu_synid_gfx8_sdst_1cf20d:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_sdst_1.rst b/llvm/docs/AMDGPU/gfx8_sdst_313759.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_sdst_1.rst
rename to llvm/docs/AMDGPU/gfx8_sdst_313759.rst
index 3a874930c235..5a1520ad862f 100644
--- a/llvm/docs/AMDGPU/gfx8_sdst_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdst_313759.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdst_1:
+.. _amdgpu_synid_gfx8_sdst_313759:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_sdst_4.rst b/llvm/docs/AMDGPU/gfx8_sdst_362c37.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_sdst_4.rst
rename to llvm/docs/AMDGPU/gfx8_sdst_362c37.rst
index c89b7376176c..a1809826fd7c 100644
--- a/llvm/docs/AMDGPU/gfx8_sdst_4.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdst_362c37.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdst_4:
+.. _amdgpu_synid_gfx8_sdst_362c37:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_sdst_2.rst b/llvm/docs/AMDGPU/gfx8_sdst_61db0e.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_sdst_2.rst
rename to llvm/docs/AMDGPU/gfx8_sdst_61db0e.rst
index 7cf48d57adca..a6a06af84eb4 100644
--- a/llvm/docs/AMDGPU/gfx8_sdst_2.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdst_61db0e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdst_2:
+.. _amdgpu_synid_gfx8_sdst_61db0e:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_sdst_6.rst b/llvm/docs/AMDGPU/gfx8_sdst_6eddac.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_sdst_6.rst
rename to llvm/docs/AMDGPU/gfx8_sdst_6eddac.rst
index a9649d857264..9350674fe228 100644
--- a/llvm/docs/AMDGPU/gfx8_sdst_6.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdst_6eddac.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdst_6:
+.. _amdgpu_synid_gfx8_sdst_6eddac:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_sdst.rst b/llvm/docs/AMDGPU/gfx8_sdst_78579b.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_sdst.rst
rename to llvm/docs/AMDGPU/gfx8_sdst_78579b.rst
index 8a3d805343f0..78419da67f20 100644
--- a/llvm/docs/AMDGPU/gfx8_sdst.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdst_78579b.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdst:
+.. _amdgpu_synid_gfx8_sdst_78579b:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_sdst_7.rst b/llvm/docs/AMDGPU/gfx8_sdst_8d900a.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_sdst_7.rst
rename to llvm/docs/AMDGPU/gfx8_sdst_8d900a.rst
index dc58839db90c..64aaa14b82c6 100644
--- a/llvm/docs/AMDGPU/gfx8_sdst_7.rst
+++ b/llvm/docs/AMDGPU/gfx8_sdst_8d900a.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_sdst_7:
+.. _amdgpu_synid_gfx8_sdst_8d900a:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_simm32_2.rst b/llvm/docs/AMDGPU/gfx8_simm32_6f0844.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_simm32_2.rst
rename to llvm/docs/AMDGPU/gfx8_simm32_6f0844.rst
index 5b88c7ee4a73..c6cb04bd8aee 100644
--- a/llvm/docs/AMDGPU/gfx8_simm32_2.rst
+++ b/llvm/docs/AMDGPU/gfx8_simm32_6f0844.rst
@@ -5,10 +5,10 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_simm32_2:
+.. _amdgpu_synid_gfx8_simm32_6f0844:
simm32
======
A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
-The value is converted to *f32* as described :ref:`here<amdgpu_synid_fp_conv>`.
+The value is converted to *f32* as described :ref:`here<amdgpu_synid_conv>`.
diff --git a/llvm/docs/AMDGPU/gfx8_simm32.rst b/llvm/docs/AMDGPU/gfx8_simm32_a3e80c.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx8_simm32.rst
rename to llvm/docs/AMDGPU/gfx8_simm32_a3e80c.rst
index e748b0d7d100..9a84e9103292 100644
--- a/llvm/docs/AMDGPU/gfx8_simm32.rst
+++ b/llvm/docs/AMDGPU/gfx8_simm32_a3e80c.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_simm32:
+.. _amdgpu_synid_gfx8_simm32_a3e80c:
simm32
======
diff --git a/llvm/docs/AMDGPU/gfx8_simm32_1.rst b/llvm/docs/AMDGPU/gfx8_simm32_be0c1c.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_simm32_1.rst
rename to llvm/docs/AMDGPU/gfx8_simm32_be0c1c.rst
index 4114ba283fcc..7c10bae072d0 100644
--- a/llvm/docs/AMDGPU/gfx8_simm32_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_simm32_be0c1c.rst
@@ -5,10 +5,10 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_simm32_1:
+.. _amdgpu_synid_gfx8_simm32_be0c1c:
simm32
======
A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
-The value is converted to *f16* as described :ref:`here<amdgpu_synid_fp_conv>`.
+The value is converted to *f16* as described :ref:`here<amdgpu_synid_conv>`.
diff --git a/llvm/docs/AMDGPU/gfx8_soffset_2.rst b/llvm/docs/AMDGPU/gfx8_soffset_499d5b.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx8_soffset_2.rst
rename to llvm/docs/AMDGPU/gfx8_soffset_499d5b.rst
index e9d6c654b82d..8bedf8b26cf2 100644
--- a/llvm/docs/AMDGPU/gfx8_soffset_2.rst
+++ b/llvm/docs/AMDGPU/gfx8_soffset_499d5b.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_soffset_2:
+.. _amdgpu_synid_gfx8_soffset_499d5b:
soffset
=======
diff --git a/llvm/docs/AMDGPU/gfx8_soffset.rst b/llvm/docs/AMDGPU/gfx8_soffset_abb420.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_soffset.rst
rename to llvm/docs/AMDGPU/gfx8_soffset_abb420.rst
index 6a75e3427d03..7ae00969f9d0 100644
--- a/llvm/docs/AMDGPU/gfx8_soffset.rst
+++ b/llvm/docs/AMDGPU/gfx8_soffset_abb420.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_soffset:
+.. _amdgpu_synid_gfx8_soffset_abb420:
soffset
=======
diff --git a/llvm/docs/AMDGPU/gfx8_soffset_1.rst b/llvm/docs/AMDGPU/gfx8_soffset_ac5750.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_soffset_1.rst
rename to llvm/docs/AMDGPU/gfx8_soffset_ac5750.rst
index 2b470445a28f..f31651f06af8 100644
--- a/llvm/docs/AMDGPU/gfx8_soffset_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_soffset_ac5750.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_soffset_1:
+.. _amdgpu_synid_gfx8_soffset_ac5750:
soffset
=======
diff --git a/llvm/docs/AMDGPU/gfx8_src_4.rst b/llvm/docs/AMDGPU/gfx8_src_021c9b.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_src_4.rst
rename to llvm/docs/AMDGPU/gfx8_src_021c9b.rst
index be6235551256..017d1cc748ed 100644
--- a/llvm/docs/AMDGPU/gfx8_src_4.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_021c9b.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src_4:
+.. _amdgpu_synid_gfx8_src_021c9b:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_src.rst b/llvm/docs/AMDGPU/gfx8_src_2dcf49.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx8_src.rst
rename to llvm/docs/AMDGPU/gfx8_src_2dcf49.rst
index 15439b6dce53..90fda3226867 100644
--- a/llvm/docs/AMDGPU/gfx8_src.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_2dcf49.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src:
+.. _amdgpu_synid_gfx8_src_2dcf49:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_src_8.rst b/llvm/docs/AMDGPU/gfx8_src_39a989.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_src_8.rst
rename to llvm/docs/AMDGPU/gfx8_src_39a989.rst
index 75f2dcec72cc..1f5188f65d77 100644
--- a/llvm/docs/AMDGPU/gfx8_src_8.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_39a989.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src_8:
+.. _amdgpu_synid_gfx8_src_39a989:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_src_3.rst b/llvm/docs/AMDGPU/gfx8_src_516946.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx8_src_3.rst
rename to llvm/docs/AMDGPU/gfx8_src_516946.rst
index 3b1f63b0314a..59e50ed94042 100644
--- a/llvm/docs/AMDGPU/gfx8_src_3.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_516946.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src_3:
+.. _amdgpu_synid_gfx8_src_516946:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_src_1.rst b/llvm/docs/AMDGPU/gfx8_src_67227c.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_src_1.rst
rename to llvm/docs/AMDGPU/gfx8_src_67227c.rst
index 275735c5439f..083e66f0d756 100644
--- a/llvm/docs/AMDGPU/gfx8_src_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_67227c.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src_1:
+.. _amdgpu_synid_gfx8_src_67227c:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_src_9.rst b/llvm/docs/AMDGPU/gfx8_src_87dc5c.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_src_9.rst
rename to llvm/docs/AMDGPU/gfx8_src_87dc5c.rst
index 4b5b1eca3faa..6f53d7e3607a 100644
--- a/llvm/docs/AMDGPU/gfx8_src_9.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_87dc5c.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src_9:
+.. _amdgpu_synid_gfx8_src_87dc5c:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_src_2.rst b/llvm/docs/AMDGPU/gfx8_src_8a6ea8.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx8_src_2.rst
rename to llvm/docs/AMDGPU/gfx8_src_8a6ea8.rst
index 128faaa3730a..336935e5eea4 100644
--- a/llvm/docs/AMDGPU/gfx8_src_2.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_8a6ea8.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src_2:
+.. _amdgpu_synid_gfx8_src_8a6ea8:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_src_5.rst b/llvm/docs/AMDGPU/gfx8_src_a13aeb.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_src_5.rst
rename to llvm/docs/AMDGPU/gfx8_src_a13aeb.rst
index ec7d46c14973..4027d671f274 100644
--- a/llvm/docs/AMDGPU/gfx8_src_5.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_a13aeb.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src_5:
+.. _amdgpu_synid_gfx8_src_a13aeb:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_src_10.rst b/llvm/docs/AMDGPU/gfx8_src_b38805.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_src_10.rst
rename to llvm/docs/AMDGPU/gfx8_src_b38805.rst
index 5d8df883c9c6..6fdf4af63d7a 100644
--- a/llvm/docs/AMDGPU/gfx8_src_10.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_b38805.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src_10:
+.. _amdgpu_synid_gfx8_src_b38805:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_src_7.rst b/llvm/docs/AMDGPU/gfx8_src_d9175b.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_src_7.rst
rename to llvm/docs/AMDGPU/gfx8_src_d9175b.rst
index 366eace4e101..eee7897dbff1 100644
--- a/llvm/docs/AMDGPU/gfx8_src_7.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_d9175b.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src_7:
+.. _amdgpu_synid_gfx8_src_d9175b:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_src_6.rst b/llvm/docs/AMDGPU/gfx8_src_df6b53.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_src_6.rst
rename to llvm/docs/AMDGPU/gfx8_src_df6b53.rst
index bd52d5ab8afb..7a3e4dfd443a 100644
--- a/llvm/docs/AMDGPU/gfx8_src_6.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_df6b53.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_src_6:
+.. _amdgpu_synid_gfx8_src_df6b53:
src
===
diff --git a/llvm/docs/AMDGPU/gfx8_srsrc.rst b/llvm/docs/AMDGPU/gfx8_srsrc_cf7132.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_srsrc.rst
rename to llvm/docs/AMDGPU/gfx8_srsrc_cf7132.rst
index 11ce8a4e3953..a6740227bd0c 100644
--- a/llvm/docs/AMDGPU/gfx8_srsrc.rst
+++ b/llvm/docs/AMDGPU/gfx8_srsrc_cf7132.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_srsrc:
+.. _amdgpu_synid_gfx8_srsrc_cf7132:
srsrc
=====
diff --git a/llvm/docs/AMDGPU/gfx8_srsrc_1.rst b/llvm/docs/AMDGPU/gfx8_srsrc_e73d16.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx8_srsrc_1.rst
rename to llvm/docs/AMDGPU/gfx8_srsrc_e73d16.rst
index 0fdb39e58dcf..2400220c6196 100644
--- a/llvm/docs/AMDGPU/gfx8_srsrc_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_srsrc_e73d16.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_srsrc_1:
+.. _amdgpu_synid_gfx8_srsrc_e73d16:
srsrc
=====
diff --git a/llvm/docs/AMDGPU/gfx8_ssrc_5.rst b/llvm/docs/AMDGPU/gfx8_ssrc_0eec95.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_ssrc_5.rst
rename to llvm/docs/AMDGPU/gfx8_ssrc_0eec95.rst
index 859852d20f44..5bf995eb7bc9 100644
--- a/llvm/docs/AMDGPU/gfx8_ssrc_5.rst
+++ b/llvm/docs/AMDGPU/gfx8_ssrc_0eec95.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_ssrc_5:
+.. _amdgpu_synid_gfx8_ssrc_0eec95:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_ssrc_6.rst b/llvm/docs/AMDGPU/gfx8_ssrc_133cbc.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_ssrc_6.rst
rename to llvm/docs/AMDGPU/gfx8_ssrc_133cbc.rst
index 1f6d5473b9de..518dd4fa83db 100644
--- a/llvm/docs/AMDGPU/gfx8_ssrc_6.rst
+++ b/llvm/docs/AMDGPU/gfx8_ssrc_133cbc.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_ssrc_6:
+.. _amdgpu_synid_gfx8_ssrc_133cbc:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_ssrc_1.rst b/llvm/docs/AMDGPU/gfx8_ssrc_6706dc.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_ssrc_1.rst
rename to llvm/docs/AMDGPU/gfx8_ssrc_6706dc.rst
index 266e963e7b9b..9b599a71ae96 100644
--- a/llvm/docs/AMDGPU/gfx8_ssrc_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_ssrc_6706dc.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_ssrc_1:
+.. _amdgpu_synid_gfx8_ssrc_6706dc:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_ssrc_4.rst b/llvm/docs/AMDGPU/gfx8_ssrc_a2142e.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_ssrc_4.rst
rename to llvm/docs/AMDGPU/gfx8_ssrc_a2142e.rst
index 2e771c2f161f..a62732b58aaa 100644
--- a/llvm/docs/AMDGPU/gfx8_ssrc_4.rst
+++ b/llvm/docs/AMDGPU/gfx8_ssrc_a2142e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_ssrc_4:
+.. _amdgpu_synid_gfx8_ssrc_a2142e:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_ssrc_2.rst b/llvm/docs/AMDGPU/gfx8_ssrc_c8788e.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_ssrc_2.rst
rename to llvm/docs/AMDGPU/gfx8_ssrc_c8788e.rst
index 38aca6f1860f..3142e084093e 100644
--- a/llvm/docs/AMDGPU/gfx8_ssrc_2.rst
+++ b/llvm/docs/AMDGPU/gfx8_ssrc_c8788e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_ssrc_2:
+.. _amdgpu_synid_gfx8_ssrc_c8788e:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_ssrc_8.rst b/llvm/docs/AMDGPU/gfx8_ssrc_dcd0d4.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_ssrc_8.rst
rename to llvm/docs/AMDGPU/gfx8_ssrc_dcd0d4.rst
index e6f8500c1d18..69c90ff4228a 100644
--- a/llvm/docs/AMDGPU/gfx8_ssrc_8.rst
+++ b/llvm/docs/AMDGPU/gfx8_ssrc_dcd0d4.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_ssrc_8:
+.. _amdgpu_synid_gfx8_ssrc_dcd0d4:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_ssrc_3.rst b/llvm/docs/AMDGPU/gfx8_ssrc_e587f5.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_ssrc_3.rst
rename to llvm/docs/AMDGPU/gfx8_ssrc_e587f5.rst
index f4700b14da50..6784e73a9882 100644
--- a/llvm/docs/AMDGPU/gfx8_ssrc_3.rst
+++ b/llvm/docs/AMDGPU/gfx8_ssrc_e587f5.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_ssrc_3:
+.. _amdgpu_synid_gfx8_ssrc_e587f5:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_ssrc.rst b/llvm/docs/AMDGPU/gfx8_ssrc_f308b1.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_ssrc.rst
rename to llvm/docs/AMDGPU/gfx8_ssrc_f308b1.rst
index 9449afeed91f..a8fb15c55f42 100644
--- a/llvm/docs/AMDGPU/gfx8_ssrc.rst
+++ b/llvm/docs/AMDGPU/gfx8_ssrc_f308b1.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_ssrc:
+.. _amdgpu_synid_gfx8_ssrc_f308b1:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_ssrc_7.rst b/llvm/docs/AMDGPU/gfx8_ssrc_f48190.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_ssrc_7.rst
rename to llvm/docs/AMDGPU/gfx8_ssrc_f48190.rst
index 1f09600aaa07..ecf793d0fe57 100644
--- a/llvm/docs/AMDGPU/gfx8_ssrc_7.rst
+++ b/llvm/docs/AMDGPU/gfx8_ssrc_f48190.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_ssrc_7:
+.. _amdgpu_synid_gfx8_ssrc_f48190:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_tgt.rst b/llvm/docs/AMDGPU/gfx8_tgt.rst
index 431d4fa6dc45..0c3331367eff 100644
--- a/llvm/docs/AMDGPU/gfx8_tgt.rst
+++ b/llvm/docs/AMDGPU/gfx8_tgt.rst
@@ -12,12 +12,12 @@ tgt
An export target:
- ============== ===================================
- Syntax Description
- ============== ===================================
- pos{0..3} Copy vertex position 0..3.
- param{0..31} Copy vertex parameter 0..31.
- mrt{0..7} Copy pixel color to the MRTs 0..7.
- mrtz Copy pixel depth (Z) data.
- null Copy nothing.
- ============== ===================================
+ ================== ===================================
+ Syntax Description
+ ================== ===================================
+ pos{0..3} Copy vertex position 0..3.
+ param{0..31} Copy vertex parameter 0..31.
+ mrt{0..7} Copy pixel color to the MRTs 0..7.
+ mrtz Copy pixel depth (Z) data.
+ null Copy nothing.
+ ================== ===================================
diff --git a/llvm/docs/AMDGPU/gfx8_vaddr_1.rst b/llvm/docs/AMDGPU/gfx8_vaddr_9f7133.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vaddr_1.rst
rename to llvm/docs/AMDGPU/gfx8_vaddr_9f7133.rst
index 279fe729473e..bef5187613f6 100644
--- a/llvm/docs/AMDGPU/gfx8_vaddr_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_vaddr_9f7133.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vaddr_1:
+.. _amdgpu_synid_gfx8_vaddr_9f7133:
vaddr
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vaddr_3.rst b/llvm/docs/AMDGPU/gfx8_vaddr_b73dc0.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx8_vaddr_3.rst
rename to llvm/docs/AMDGPU/gfx8_vaddr_b73dc0.rst
index b40dac12c8c9..0b55d863d3d0 100644
--- a/llvm/docs/AMDGPU/gfx8_vaddr_3.rst
+++ b/llvm/docs/AMDGPU/gfx8_vaddr_b73dc0.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vaddr_3:
+.. _amdgpu_synid_gfx8_vaddr_b73dc0:
vaddr
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vaddr_2.rst b/llvm/docs/AMDGPU/gfx8_vaddr_e9b690.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx8_vaddr_2.rst
rename to llvm/docs/AMDGPU/gfx8_vaddr_e9b690.rst
index 5bcd1b04ad59..391b44ce8724 100644
--- a/llvm/docs/AMDGPU/gfx8_vaddr_2.rst
+++ b/llvm/docs/AMDGPU/gfx8_vaddr_e9b690.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vaddr_2:
+.. _amdgpu_synid_gfx8_vaddr_e9b690:
vaddr
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vaddr.rst b/llvm/docs/AMDGPU/gfx8_vaddr_f20ee4.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vaddr.rst
rename to llvm/docs/AMDGPU/gfx8_vaddr_f20ee4.rst
index 4df48f46351a..b018b012542d 100644
--- a/llvm/docs/AMDGPU/gfx8_vaddr.rst
+++ b/llvm/docs/AMDGPU/gfx8_vaddr_f20ee4.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vaddr:
+.. _amdgpu_synid_gfx8_vaddr_f20ee4:
vaddr
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata0.rst b/llvm/docs/AMDGPU/gfx8_vdata0_6802ce.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx8_vdata0.rst
rename to llvm/docs/AMDGPU/gfx8_vdata0_6802ce.rst
index 2bf2274ac031..e0f66cae2393 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata0.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata0_6802ce.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata0:
+.. _amdgpu_synid_gfx8_vdata0_6802ce:
vdata0
======
diff --git a/llvm/docs/AMDGPU/gfx8_vdata0_1.rst b/llvm/docs/AMDGPU/gfx8_vdata0_fd235e.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx8_vdata0_1.rst
rename to llvm/docs/AMDGPU/gfx8_vdata0_fd235e.rst
index d0a04f22f5ec..5fcbf08c5d0e 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata0_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata0_fd235e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata0_1:
+.. _amdgpu_synid_gfx8_vdata0_fd235e:
vdata0
======
diff --git a/llvm/docs/AMDGPU/gfx8_vdata1.rst b/llvm/docs/AMDGPU/gfx8_vdata1_6802ce.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx8_vdata1.rst
rename to llvm/docs/AMDGPU/gfx8_vdata1_6802ce.rst
index 6009018b72af..a0cbbde41e94 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata1.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata1_6802ce.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata1:
+.. _amdgpu_synid_gfx8_vdata1_6802ce:
vdata1
======
diff --git a/llvm/docs/AMDGPU/gfx8_vdata1_1.rst b/llvm/docs/AMDGPU/gfx8_vdata1_fd235e.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx8_vdata1_1.rst
rename to llvm/docs/AMDGPU/gfx8_vdata1_fd235e.rst
index 5b5ce86ff2aa..60302c70c506 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata1_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata1_fd235e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata1_1:
+.. _amdgpu_synid_gfx8_vdata1_fd235e:
vdata1
======
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_4.rst b/llvm/docs/AMDGPU/gfx8_vdata_325b78.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx8_vdata_4.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_325b78.rst
index 6feb94be08ce..0389fc170ad7 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_4.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_325b78.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_4:
+.. _amdgpu_synid_gfx8_vdata_325b78:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_5.rst b/llvm/docs/AMDGPU/gfx8_vdata_4d8ecf.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx8_vdata_5.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_4d8ecf.rst
index 33ca105c3a62..62fb38b729b4 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_5.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_4d8ecf.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_5:
+.. _amdgpu_synid_gfx8_vdata_4d8ecf:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_10.rst b/llvm/docs/AMDGPU/gfx8_vdata_4f639e.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdata_10.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_4f639e.rst
index 1c3a8728c943..0c30dfb5d96b 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_10.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_4f639e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_10:
+.. _amdgpu_synid_gfx8_vdata_4f639e:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_3.rst b/llvm/docs/AMDGPU/gfx8_vdata_56f215.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vdata_3.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_56f215.rst
index f7bc70fd1c97..f2922f5072fe 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_3.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_56f215.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_3:
+.. _amdgpu_synid_gfx8_vdata_56f215:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata.rst b/llvm/docs/AMDGPU/gfx8_vdata_6802ce.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vdata.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_6802ce.rst
index 713dc8670c12..f79d5702e3d4 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_6802ce.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata:
+.. _amdgpu_synid_gfx8_vdata_6802ce:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_14.rst b/llvm/docs/AMDGPU/gfx8_vdata_87fb90.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_vdata_14.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_87fb90.rst
index 3fe0069e6da0..e83f36709c87 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_14.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_87fb90.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_14:
+.. _amdgpu_synid_gfx8_vdata_87fb90:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_11.rst b/llvm/docs/AMDGPU/gfx8_vdata_886702.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdata_11.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_886702.rst
index 4c79ea31e6d7..271b1912f0dc 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_11.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_886702.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_11:
+.. _amdgpu_synid_gfx8_vdata_886702:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_6.rst b/llvm/docs/AMDGPU/gfx8_vdata_a9eee3.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx8_vdata_6.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_a9eee3.rst
index a6c7f230201e..15e681593770 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_6.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_a9eee3.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_6:
+.. _amdgpu_synid_gfx8_vdata_a9eee3:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_8.rst b/llvm/docs/AMDGPU/gfx8_vdata_aeb804.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vdata_8.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_aeb804.rst
index a52ff705977a..dad0b09481fd 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_8.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_aeb804.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_8:
+.. _amdgpu_synid_gfx8_vdata_aeb804:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_13.rst b/llvm/docs/AMDGPU/gfx8_vdata_b2a787.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_vdata_13.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_b2a787.rst
index 6e439c1710a0..bb232d58d815 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_13.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_b2a787.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_13:
+.. _amdgpu_synid_gfx8_vdata_b2a787:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_7.rst b/llvm/docs/AMDGPU/gfx8_vdata_c08393.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdata_7.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_c08393.rst
index be7ea7009643..c0aaa70e918f 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_7.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_c08393.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_7:
+.. _amdgpu_synid_gfx8_vdata_c08393:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_12.rst b/llvm/docs/AMDGPU/gfx8_vdata_c61803.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_vdata_12.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_c61803.rst
index d25ce77f0627..5a7cc57317c7 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_12.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_c61803.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_12:
+.. _amdgpu_synid_gfx8_vdata_c61803:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_2.rst b/llvm/docs/AMDGPU/gfx8_vdata_e016a1.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vdata_2.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_e016a1.rst
index 5283001e7945..a5dab4189a20 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_2.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_e016a1.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_2:
+.. _amdgpu_synid_gfx8_vdata_e016a1:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_9.rst b/llvm/docs/AMDGPU/gfx8_vdata_f2bf57.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdata_9.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_f2bf57.rst
index d00f40291b04..3c1267864767 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_9.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_f2bf57.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_9:
+.. _amdgpu_synid_gfx8_vdata_f2bf57:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdata_1.rst b/llvm/docs/AMDGPU/gfx8_vdata_fd235e.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vdata_1.rst
rename to llvm/docs/AMDGPU/gfx8_vdata_fd235e.rst
index d89b1f7fd174..0b13c6ff52ff 100644
--- a/llvm/docs/AMDGPU/gfx8_vdata_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdata_fd235e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdata_1:
+.. _amdgpu_synid_gfx8_vdata_fd235e:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_8.rst b/llvm/docs/AMDGPU/gfx8_vdst_0b9599.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx8_vdst_8.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_0b9599.rst
index 2288dd83a1fa..05b2017dd79e 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_8.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_0b9599.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_8:
+.. _amdgpu_synid_gfx8_vdst_0b9599:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_10.rst b/llvm/docs/AMDGPU/gfx8_vdst_3c54c3.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_vdst_10.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_3c54c3.rst
index eed24091f51d..b65417f81f6f 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_10.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_3c54c3.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_10:
+.. _amdgpu_synid_gfx8_vdst_3c54c3:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_11.rst b/llvm/docs/AMDGPU/gfx8_vdst_3c6fb6.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_vdst_11.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_3c6fb6.rst
index 37d160bbeb12..8cad996a5a90 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_11.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_3c6fb6.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_11:
+.. _amdgpu_synid_gfx8_vdst_3c6fb6:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_7.rst b/llvm/docs/AMDGPU/gfx8_vdst_3d7dcf.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_vdst_7.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_3d7dcf.rst
index f47e838e6a25..5e49be7f50c1 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_7.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_3d7dcf.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_7:
+.. _amdgpu_synid_gfx8_vdst_3d7dcf:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_5.rst b/llvm/docs/AMDGPU/gfx8_vdst_463513.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdst_5.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_463513.rst
index be066c7e0c8e..ba5621126240 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_5.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_463513.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_5:
+.. _amdgpu_synid_gfx8_vdst_463513:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_3.rst b/llvm/docs/AMDGPU/gfx8_vdst_48e42f.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vdst_3.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_48e42f.rst
index 897d78ccf6f5..713a3b46328d 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_3.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_48e42f.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_3:
+.. _amdgpu_synid_gfx8_vdst_48e42f:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_13.rst b/llvm/docs/AMDGPU/gfx8_vdst_5d50a1.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdst_13.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_5d50a1.rst
index 3af0bcb22c10..3d9ebfc4e261 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_13.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_5d50a1.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_13:
+.. _amdgpu_synid_gfx8_vdst_5d50a1:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_2.rst b/llvm/docs/AMDGPU/gfx8_vdst_69a144.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vdst_2.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_69a144.rst
index 26daa85eb9b0..4fd3392e5e3d 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_2.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_69a144.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_2:
+.. _amdgpu_synid_gfx8_vdst_69a144:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_12.rst b/llvm/docs/AMDGPU/gfx8_vdst_7eb33e.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx8_vdst_12.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_7eb33e.rst
index a79d7924233a..bbb3f0770ba2 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_12.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_7eb33e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_12:
+.. _amdgpu_synid_gfx8_vdst_7eb33e:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_17.rst b/llvm/docs/AMDGPU/gfx8_vdst_875645.rst
similarity index 79%
rename from llvm/docs/AMDGPU/gfx8_vdst_17.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_875645.rst
index 7d9929abcf53..dd833f08309e 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_17.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_875645.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_17:
+.. _amdgpu_synid_gfx8_vdst_875645:
vdst
====
Instruction output: data read from a memory buffer.
-If :ref:`lds<amdgpu_synid_lds>` is specified, this operand is ignored by H/W and data are stored directly into LDS.
+This is an optional operand. It must be used if and only if :ref:`lds<amdgpu_synid_lds>` is omitted.
*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
diff --git a/llvm/docs/AMDGPU/gfx8_vdst.rst b/llvm/docs/AMDGPU/gfx8_vdst_89680f.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vdst.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_89680f.rst
index 227ee5376914..bc2a146c38a7 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_89680f.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst:
+.. _amdgpu_synid_gfx8_vdst_89680f:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_15.rst b/llvm/docs/AMDGPU/gfx8_vdst_a49b76.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdst_15.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_a49b76.rst
index 20135ddefec9..8767323f7d6d 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_15.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_a49b76.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_15:
+.. _amdgpu_synid_gfx8_vdst_a49b76:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_1.rst b/llvm/docs/AMDGPU/gfx8_vdst_bdb32f.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vdst_1.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_bdb32f.rst
index 566cb1d13b08..089bec9b4f78 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_bdb32f.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_1:
+.. _amdgpu_synid_gfx8_vdst_bdb32f:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_4.rst b/llvm/docs/AMDGPU/gfx8_vdst_d0dc43.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdst_4.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_d0dc43.rst
index 928ebda2de7f..13fc063b3064 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_4.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_d0dc43.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_4:
+.. _amdgpu_synid_gfx8_vdst_d0dc43:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_14.rst b/llvm/docs/AMDGPU/gfx8_vdst_d7c57e.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdst_14.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_d7c57e.rst
index 5de619e78233..d50a54cd20f3 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_14.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_d7c57e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_14:
+.. _amdgpu_synid_gfx8_vdst_d7c57e:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_9.rst b/llvm/docs/AMDGPU/gfx8_vdst_d85497.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdst_9.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_d85497.rst
index 2aefb8af3f13..6e8f8817c715 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_9.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_d85497.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_9:
+.. _amdgpu_synid_gfx8_vdst_d85497:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_6.rst b/llvm/docs/AMDGPU/gfx8_vdst_e0515f.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx8_vdst_6.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_e0515f.rst
index 1f38906417cf..1366d844827b 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_6.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_e0515f.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_6:
+.. _amdgpu_synid_gfx8_vdst_e0515f:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vdst_16.rst b/llvm/docs/AMDGPU/gfx8_vdst_f47754.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx8_vdst_16.rst
rename to llvm/docs/AMDGPU/gfx8_vdst_f47754.rst
index d2410a72c6b6..a55e5d32d81b 100644
--- a/llvm/docs/AMDGPU/gfx8_vdst_16.rst
+++ b/llvm/docs/AMDGPU/gfx8_vdst_f47754.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vdst_16:
+.. _amdgpu_synid_gfx8_vdst_f47754:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx8_vsrc.rst b/llvm/docs/AMDGPU/gfx8_vsrc_533a4e.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx8_vsrc.rst
rename to llvm/docs/AMDGPU/gfx8_vsrc_533a4e.rst
index ae1ccfbb2960..e3b89aea27a3 100644
--- a/llvm/docs/AMDGPU/gfx8_vsrc.rst
+++ b/llvm/docs/AMDGPU/gfx8_vsrc_533a4e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vsrc:
+.. _amdgpu_synid_gfx8_vsrc_533a4e:
vsrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_vsrc_1.rst b/llvm/docs/AMDGPU/gfx8_vsrc_6802ce.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vsrc_1.rst
rename to llvm/docs/AMDGPU/gfx8_vsrc_6802ce.rst
index 1f256412604d..e622a0a99be4 100644
--- a/llvm/docs/AMDGPU/gfx8_vsrc_1.rst
+++ b/llvm/docs/AMDGPU/gfx8_vsrc_6802ce.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vsrc_1:
+.. _amdgpu_synid_gfx8_vsrc_6802ce:
vsrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_vsrc_2.rst b/llvm/docs/AMDGPU/gfx8_vsrc_e016a1.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vsrc_2.rst
rename to llvm/docs/AMDGPU/gfx8_vsrc_e016a1.rst
index 48ba2fdb4b7d..0d20223aa368 100644
--- a/llvm/docs/AMDGPU/gfx8_vsrc_2.rst
+++ b/llvm/docs/AMDGPU/gfx8_vsrc_e016a1.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vsrc_2:
+.. _amdgpu_synid_gfx8_vsrc_e016a1:
vsrc
====
diff --git a/llvm/docs/AMDGPU/gfx8_vsrc_3.rst b/llvm/docs/AMDGPU/gfx8_vsrc_fd235e.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx8_vsrc_3.rst
rename to llvm/docs/AMDGPU/gfx8_vsrc_fd235e.rst
index 0e0d13007629..a95190710ce1 100644
--- a/llvm/docs/AMDGPU/gfx8_vsrc_3.rst
+++ b/llvm/docs/AMDGPU/gfx8_vsrc_fd235e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx8_vsrc_3:
+.. _amdgpu_synid_gfx8_vsrc_fd235e:
vsrc
====
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