[PATCH] D126854: [RISCV] Define risc-v's own register class to model FP Register.

Kito Cheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 5 22:50:19 PDT 2022

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kito-cheng accepted this revision.
kito-cheng added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D126854/new/

https://reviews.llvm.org/D126854

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