[PATCH] D125364: [RISCV] Replace ISD::FP_EXTEND and ISD::FP_ROUND with RVV VL op.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 24 21:46:20 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:827
+ (!cast<Instruction>(instruction_name#"_VV_"#vti.LMul.MX)
+ vti.RegClass:$rs2, vti.RegClass:$rs1, GPR:$vl, vti.Log2SEW)>;
+ def : Pat<(op (wti.Vector (riscv_fpextend_vl_oneuse
----------------
jacquesguan wrote:
> craig.topper wrote:
> > This is taking the VL from the fpextend_vl node, but the root node of the pattern has no VL operand. Shouldn't we still be using vti.AVL?
> That would cause error `dead named input: $vl`.
Yes it would, but's because we don't want that vl. I think you need to use `(XLenVT srcvalue)` instead of VLOpFrag.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125364/new/
https://reviews.llvm.org/D125364
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