[PATCH] D125498: [AMDGPU] gfx11 scalar alu instructions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

Missing test for intrinsics selection?



================
Comment at: llvm/include/llvm/IR/IntrinsicsAMDGPU.td:213
+def int_amdgcn_s_sendmsg_rtn : Intrinsic <[llvm_anyint_ty], [llvm_i32_ty],
+  [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects]>;
+
----------------
Missing a bunch of attributes (but they’re also the ones missing from every other intrinsic so probably best to just ignore it for now)


================
Comment at: llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp:500
+    Res = tryDecodeInst<uint64_t>(DecoderTableGFX1132, MI, DW, Address);
+    if (Res) break;
+
----------------
Seems weird that we aren’t guarding each table lookup with subtarget checks 


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  https://reviews.llvm.org/D125498/new/

https://reviews.llvm.org/D125498