[PATCH] D123782: [AArch64] Generate AND in place of CSEL for Table Based CTTZ lowering in -O3

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

I can commit this for you if you don't have commit access yet. I would just need a "name <email at domain.com" for the attribution.


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  https://reviews.llvm.org/D123782/new/

https://reviews.llvm.org/D123782