[PATCH] D123782: [AArch64] Generate AND in place of CSEL for Table Based CTTZ lowering in -O3
Rahul via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 5 22:26:30 PDT 2022
rahular-rrlogic updated this revision to Diff 427530.
rahular-rrlogic added a comment.
Removed the unneeded call to a getValue as pointed out.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D123782/new/
https://reviews.llvm.org/D123782
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/fold-csel-cttz-and.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D123782.427530.patch
Type: text/x-patch
Size: 6509 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220506/28aa6173/attachment.bin>
More information about the llvm-commits
mailing list