[PATCH] D123782: [AArch64] Generate AND in place of CSEL for Table Based CTTZ lowering in -O3

[Djordje Todorovic via Phabricator via llvm-commits]

djtodoro added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/table-based-cttz.ll:1
+; RUN: llc -march=aarch64 < %s | FileCheck %s
+
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Can we add a top-level comment here, describing what we are testing?


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  https://reviews.llvm.org/D123782/new/

https://reviews.llvm.org/D123782