[PATCH] D123970: [RISCV] Add isCommutable to ADD/ADDW/MUL/AND/OR/XOR.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 18 18:27:03 PDT 2022
craig.topper updated this revision to Diff 423500.
craig.topper added a comment.
Fix 80 column violations and add an inline comment to the new template argument.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D123970/new/
https://reviews.llvm.org/D123970
Files:
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/lib/Target/RISCV/RISCVInstrInfoM.td
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