[PATCH] D122829: [AArch64] Optimize SDIV with pow2 constant divisor

[David Sherwood via Phabricator via llvm-commits]

david-arm added a comment.

Is it also possible that in some contexts we may want to avoid setting flags where possible? i.e. for loops with control flow? The architecture only has one flags register, but has many GPRs.


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https://reviews.llvm.org/D122829