[PATCH] D122563: [RISCV] Add DAGCombine to fold base operation and reduction.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 29 12:45:24 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:7254
+ if (Opc == ISD::FADD && !N->getFlags().hasAllowReassociation() &&
+ ReduceIdx == 0)
+ return SDValue();
----------------
The ReduceIdx is relevant here. The order of the fadd operands doesn't matter. The reduce operation is before the fadd, we need to know if the fadd can be moved before the reduce.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D122563/new/
https://reviews.llvm.org/D122563
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