[PATCH] D122563: [RISCV] Add DAGCombine to fold base operation and reduction.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 29 12:42:07 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:7239
+ auto IsReduction = [&BinOpToRVVReduce](SDValue V, unsigned Opc) {
+ return V.getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
+ V.getOperand(0).getOpcode() == BinOpToRVVReduce(Opc);
----------------
I think you also need `isNullConstant(V.getOperand(1)` to make sure we're extracting the lowest element.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:7252
+
+ // Skip if FADD disallow reassociation but the combiner needs.
+ if (Opc == ISD::FADD && !N->getFlags().hasAllowReassociation() &&
----------------
disallow->disallows
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:7258
+ SDValue Extract = N->getOperand(ReduceIdx);
+ SDValue Reduce = Extract->getOperand(0);
+ if (!Reduce->hasOneUse())
----------------
Extract.getOperand(0)
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:7262
+
+ SDValue ScalarV = Reduce->getOperand(2);
+
----------------
Reduce.getOperand(2)
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:7273
+ if (Opc == ISD::FADD && N->getFlags().hasNoSignedZeros()) {
+ auto *C = dyn_cast<ConstantFPSDNode>(V.getNode());
+ return C && C->isZero();
----------------
I think you can use `isNullFPConstant`
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8454
+ case ISD::FADD:
+ return performFADDCombine(N, DAG);
+ case ISD::UMAX:
----------------
Can we just lump all these together calling combineBinOpToReduce directly until we need specific combines for them?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D122563/new/
https://reviews.llvm.org/D122563
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