[PATCH] D122084: [X86] combineAddOrSubToADCOrSBB - Fold ADD/SUB + (AND(SRL(X,Y),1) -> ADC/SBB+BT(X,Y)

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Is this still an interesting optimization if the ISD::SRL doesn't exist? Replacing (and X, 1) with bt X, 0 to get the carry flag?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D122084/new/

https://reviews.llvm.org/D122084