[PATCH] D122084: [X86] combineAddOrSubToADCOrSBB - Fold ADD/SUB + (AND(SRL(X,Y),1) -> ADC/SBB+BT(X,Y)

[Phoebe Wang via Phabricator via llvm-commits]

pengfei added a comment.

> attempt to use BT instead to fold the op and use a ADC/SBB op

Ues bit test to replace BT?



================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:52303
+  } else if (Y.getOpcode() == ISD::AND && isOneConstant(Y.getOperand(1)))
+    EFLAGS = LowerAndToBT(Y, ISD::SETNE, DL, DAG, CC);
+
----------------
Add parentheses to match with if block.


================
Comment at: llvm/test/CodeGen/X86/add-sub-bool.ll:129
 
 define i32 @test_i32_sub_sub_idx(i32 %x, i32 %y, i32 %z) {
 ; X86-LABEL: test_i32_sub_sub_idx:
----------------
So the test actually tests for `%x - (%y - bool(%z & (1 << 30))`? The name seems misleading which implies it tests for `test_sub` in PR35256.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122084/new/

https://reviews.llvm.org/D122084