[PATCH] D121524: [AMDGPU] use scalar shift for SALU users in frame index elimination

[Alexander via Phabricator via llvm-commits]

alex-t updated this revision to Diff 416490.
alex-t marked 6 inline comments as done.
alex-t added a comment.

IsSALU check chamged to query operand register class.
MIR test were made auto-generated


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121524/new/

https://reviews.llvm.org/D121524

Files:
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/test/CodeGen/AMDGPU/frame-index.mir

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