[PATCH] D121524: [AMDGPU] use scalar shift for SALU users in frame index elimination

[Alexander via Phabricator via llvm-commits]

alex-t marked 2 inline comments as done.
alex-t added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2240
+                                                   : &AMDGPU::VGPR_32RegClass;
         bool IsCopy = MI->getOpcode() == AMDGPU::V_MOV_B32_e32;
         Register ResultReg =
----------------
rampitec wrote:
> Can probably be another mov?
Never :)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121524/new/

https://reviews.llvm.org/D121524