[PATCH] D121524: [AMDGPU] use scalar shift for SALU users in frame index elimination

[Alexander via Phabricator via llvm-commits]

alex-t updated this revision to Diff 416472.
alex-t added a comment.

SCC clobbering case added. MIR test simplified.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121524/new/

https://reviews.llvm.org/D121524

Files:
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/test/CodeGen/AMDGPU/frame-index.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D121524.416472.patch
Type: text/x-patch
Size: 11354 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220318/b19d058f/attachment.bin>