[PATCH] D120226: [RISCV] Support mask policy for RVV IR intrinsics.

[Zakk Chen via Phabricator via llvm-commits]

khchen created this revision.
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Add the IsValidMaskPolicy flag to indicate the operations
result would be effected by the mask policy. (ex. mask operations).

It means RISCVInsertVSETVLI should decide the mask policy according
by mask policy operand or passthru operand.
If IsValidMaskPolicy is false (ex. nomask, store, reduction operations.),
the mask policy could be either mask undisturbed or agnostic.
Currently, RISCVInsertVSETVLI sets ValidMaskPolicy operation default to
use MA, otherwise to MU to keep the current mask policy would not changed
for nomask operstions.

Add masked-tama, masked-tamu, masked-tuma and masked-tumu test cases.
I didn't add all operations because most of implementations are using
the same pseudo multiclass. Some test maybe be duplicated in different
tests. (ex. masked vmacc with tumu shows in vmacc-rv32.ll and masked-tumu.)
I think having different tests only for policy would make the test
clear.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D120226

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/masked-tama.ll
  llvm/test/CodeGen/RISCV/rvv/masked-tamu.ll
  llvm/test/CodeGen/RISCV/rvv/masked-tuma.ll
  llvm/test/CodeGen/RISCV/rvv/masked-tumu.ll
  llvm/test/CodeGen/RISCV/rvv/vadd-policy.ll

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