[llvm] 7b67d2e - Reland [XCOFF][llvm-objdump] change the priority of symbols with the same address by symbol types.
via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 20 18:53:56 PST 2022
Author: esmeyi
Date: 2022-02-20T21:51:10-05:00
New Revision: 7b67d2e398861e9f3bdcc991cd0a900aa9c8d740
URL: https://github.com/llvm/llvm-project/commit/7b67d2e398861e9f3bdcc991cd0a900aa9c8d740
DIFF: https://github.com/llvm/llvm-project/commit/7b67d2e398861e9f3bdcc991cd0a900aa9c8d740.diff
LOG: Reland [XCOFF][llvm-objdump] change the priority of symbols with the same address by symbol types.
Fix the Buildbot failure #19373.
Differential Revision: https://reviews.llvm.org/D117642
Added:
llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-priority.ll
Modified:
llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h
llvm/include/llvm/Object/ObjectFile.h
llvm/test/CodeGen/PowerPC/aix-prefixed-instruction-boundary.mir
llvm/test/CodeGen/PowerPC/aix-return55.ll
llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll
llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test
llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-description.test
llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll
llvm/test/tools/llvm-objdump/XCOFF/print-linenumber.test
llvm/tools/llvm-objdump/llvm-objdump.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h b/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h
index 10037cd66ef12..7060620b6bd4b 100644
--- a/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h
+++ b/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h
@@ -40,26 +40,35 @@ struct SymbolInfoTy {
private:
bool IsXCOFF;
+ bool HasType;
public:
SymbolInfoTy(uint64_t Addr, StringRef Name,
Optional<XCOFF::StorageMappingClass> Smc, Optional<uint32_t> Idx,
bool Label)
- : Addr(Addr), Name(Name), XCOFFSymInfo(Smc, Idx, Label), IsXCOFF(true) {}
- SymbolInfoTy(uint64_t Addr, StringRef Name, uint8_t Type)
- : Addr(Addr), Name(Name), Type(Type), IsXCOFF(false) {}
+ : Addr(Addr), Name(Name), XCOFFSymInfo(Smc, Idx, Label), IsXCOFF(true),
+ HasType(false) {}
+ SymbolInfoTy(uint64_t Addr, StringRef Name, uint8_t Type,
+ bool IsXCOFF = false)
+ : Addr(Addr), Name(Name), Type(Type), IsXCOFF(IsXCOFF), HasType(true) {}
bool isXCOFF() const { return IsXCOFF; }
private:
friend bool operator<(const SymbolInfoTy &P1, const SymbolInfoTy &P2) {
- assert(P1.IsXCOFF == P2.IsXCOFF &&
- "P1.IsXCOFF should be equal to P2.IsXCOFF.");
+ assert((P1.IsXCOFF == P2.IsXCOFF && P1.HasType == P2.HasType) &&
+ "The value of IsXCOFF and HasType in P1 and P2 should be the same "
+ "respectively.");
+
+ if (P1.IsXCOFF && P1.HasType)
+ return std::tie(P1.Addr, P1.Type, P1.Name) <
+ std::tie(P2.Addr, P2.Type, P2.Name);
+
if (P1.IsXCOFF)
return std::tie(P1.Addr, P1.XCOFFSymInfo, P1.Name) <
std::tie(P2.Addr, P2.XCOFFSymInfo, P2.Name);
return std::tie(P1.Addr, P1.Name, P1.Type) <
- std::tie(P2.Addr, P2.Name, P2.Type);
+ std::tie(P2.Addr, P2.Name, P2.Type);
}
};
diff --git a/llvm/include/llvm/Object/ObjectFile.h b/llvm/include/llvm/Object/ObjectFile.h
index bb6f1321a68e8..1faa070052d5e 100644
--- a/llvm/include/llvm/Object/ObjectFile.h
+++ b/llvm/include/llvm/Object/ObjectFile.h
@@ -170,11 +170,11 @@ class SymbolRef : public BasicSymbolRef {
public:
enum Type {
ST_Unknown, // Type not specified
+ ST_Other,
ST_Data,
ST_Debug,
ST_File,
ST_Function,
- ST_Other
};
SymbolRef() = default;
diff --git a/llvm/test/CodeGen/PowerPC/aix-prefixed-instruction-boundary.mir b/llvm/test/CodeGen/PowerPC/aix-prefixed-instruction-boundary.mir
index 9ea49bf40c897..2947ae2c39989 100644
--- a/llvm/test/CodeGen/PowerPC/aix-prefixed-instruction-boundary.mir
+++ b/llvm/test/CodeGen/PowerPC/aix-prefixed-instruction-boundary.mir
@@ -43,7 +43,7 @@ body: |
...
# DIS: Disassembly of section .text:
-# DIS: 00000000 <.text>:
+# DIS: 00000000 <.aix-prefixed-instruction-boundary>:
# DIS-NEXT: 0: 38 60 00 02 li 3, 2
# DIS-NEXT: 4: 06 00 00 00 38 63 00 0d paddi 3, 3, 13, 0
# DIS-NEXT: c: 06 00 00 00 38 63 00 0d paddi 3, 3, 13, 0
diff --git a/llvm/test/CodeGen/PowerPC/aix-return55.ll b/llvm/test/CodeGen/PowerPC/aix-return55.ll
index c16b75bb68d8d..19e8322f8f8a2 100644
--- a/llvm/test/CodeGen/PowerPC/aix-return55.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-return55.ll
@@ -21,7 +21,7 @@ entry:
; CHECK: blr
}
-;CHECKOBJ: 00000000 <.text>:
+;CHECKOBJ: 00000000 <.foo>:
;CHECKOBJ-NEXT: 0: 38 60 00 37 li 3, 55
;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr{{[[:space:]] *}}
;CHECKOBJ-NEXT: 00000008 <.rodata.str1.1>:
diff --git a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
index b69b3760c9f4e..097eb302e4161 100644
--- a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
@@ -102,7 +102,7 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture r
; 32-REL-NOT: Type: R_RBR (0x1A)
; 32-DIS: Disassembly of section .text:
-; 32-DIS: 00000000 <.text>:
+; 32-DIS: 00000000 <.memcpy>:
; 32-DIS-NEXT: 0: 38 60 00 03 li 3, 3
; 32-DIS-NEXT: 4: 4e 80 00 20 blr
; 32-DIS-NEXT: 8: 60 00 00 00 nop
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
index 255472d65c341..c7b1d2a0771c1 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
@@ -62,7 +62,7 @@ entry:
;CHECK-NEXT: .space 1
-;CHECKOBJ: 00000000 <.text>:
+;CHECKOBJ: 00000000 <.main>:
;CHECKOBJ-NEXT: 0: 38 60 00 00 li 3, 0
;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr
;CHECKOBJ-NEXT: ...{{[[:space:]] *}}
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir
index f650168d5877d..c64552f9852c0 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir
@@ -75,7 +75,7 @@ body: |
# DIS: Disassembly of section .text:
# DIS-EMPTY:
-# DIS-NEXT: 00000000 <.text>:
+# DIS-NEXT: 00000000 <.foo>:
# DIS-NEXT: 0: 80 62 00 00 lwz 3, 0(2)
# DIS-NEXT: 4: 4e 80 00 20 blr
# DIS-EMPTY:
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
index 6ce251bb49fd8..1bbc12c5a3af5 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
@@ -422,7 +422,7 @@ declare i32 @bar(i32)
; DIS: {{.*}}aix-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000
; DIS: Disassembly of section .text:
-; DIS: 00000000 <.text>:
+; DIS: 00000000 <.foo>:
; DIS-NEXT: 0: 7c 08 02 a6 mflr 0
; DIS-NEXT: 4: 90 01 00 08 stw 0, 8(1)
; DIS-NEXT: 8: 94 21 ff c0 stwu 1, -64(1)
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll
index c8df85da0c855..8b73e748e1a89 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll
@@ -13,7 +13,7 @@ entry:
}
; CHECK: Disassembly of section .text:{{[[:space:]] *}}
-; CHECK-NEXT: 00000000 <.text>:
+; CHECK-NEXT: 00000000 <.foo>:
; CHECK-NEXT: 0: 38 60 00 00 li 3, 0
; CHECK-NEXT: 4: 4e 80 00 20 blr
; CHECK-NEXT: 8: 60 00 00 00 nop
diff --git a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test
index d94d5734a1cbd..4c96662fc854f 100644
--- a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test
+++ b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test
@@ -18,7 +18,7 @@
CHECK: Inputs/xcoff-section-headers.o: file format aixcoff-rs6000
CHECK: Disassembly of section .text:
-CHECK: 00000000 <.text>:
+CHECK: 00000000 <.func>:
CHECK-NEXT: 0: 80 62 00 04 lwz 3, 4(2)
WITH-R-NEXT: 00000002: R_TOC a
CHECK-NEXT: 4: 80 63 00 00 lwz 3, 0(3)
diff --git a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-description.test b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-description.test
index 16f7137cf3796..f33421cc6c149 100644
--- a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-description.test
+++ b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-description.test
@@ -22,7 +22,7 @@
COMMON: Inputs/xcoff-section-headers.o: file format aixcoff-rs6000
COMMON: Disassembly of section .text:
-PLAIN: 00000000 <.text>:
+PLAIN: 00000000 <.func>:
DESC: 00000000 (idx: 16) .func:
COMMON-NEXT: 0: 80 62 00 04 lwz 3, 4(2)
RELOC: 00000002: R_TOC (idx: 26) a[TC]
diff --git a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-priority.ll b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-priority.ll
new file mode 100644
index 0000000000000..6db8451ea6a13
--- /dev/null
+++ b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-priority.ll
@@ -0,0 +1,28 @@
+; RUN: llc -mtriple=powerpc-ibm-aix-xcoff %s -filetype=obj -o %t
+; RUN: llvm-objdump %t -d --no-show-raw-insn | FileCheck %s
+
+; CHECK: Disassembly of section .text:
+; CHECK: 00000000 <.foo3>:
+; CHECK: 00000020 <.foo4>:
+; CHECK: 00000040 <.foo>:
+; CHECK: 00000060 <.foo2>:
+
+define dso_local signext i32 @foo(i32 noundef signext %a) #0 section "explicit_sec" {
+entry:
+ ret i32 %a
+}
+
+define dso_local signext i32 @foo2(i32 noundef signext %a) #0 section "explicit_sec" {
+entry:
+ ret i32 %a
+}
+
+define dso_local signext i32 @foo3(i32 noundef signext %a) #0 {
+entry:
+ ret i32 %a
+}
+
+define dso_local signext i32 @foo4(i32 noundef signext %a) #0 {
+entry:
+ ret i32 %a
+}
diff --git a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll
index a6742285a148e..95399aa4d41d2 100644
--- a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll
+++ b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll
@@ -3,8 +3,7 @@
; RUN: | FileCheck %s
;; Expect to find the branch labels.
-; CHECK-LABEL: <.text>:
-;; TODO: <.internal> should be printed instead of <.text>.
+; CHECK-LABEL: <.internal>:
; CHECK-NEXT: 0: mr 4, 3
; CHECK-NEXT: 4: li 3, 0
; CHECK-NEXT: 8: mtctr 4
@@ -19,11 +18,11 @@
; CHECK-NEXT: 60: bf 8, 0x84 <L1>
; CHECK-NEXT: <L0>:
; CHECK-NEXT: 64: mr 3, 31
-; CHECK-NEXT: 68: bl 0x0 <.text>
+; CHECK-NEXT: 68: bl 0x0 <.internal>
; CHECK-NEXT: 6c: mr 31, 3
; CHECK-NEXT: 70: cmplwi 3, 11
; CHECK-NEXT: 74: bt 0, 0x60 <L2>
-; CHECK-NEXT: 78: bl 0x0 <.text>
+; CHECK-NEXT: 78: bl 0x0 <.internal>
; CHECK-NEXT: 7c: nop
; CHECK-NEXT: 80: b 0x60 <L2>
; CHECK-NEXT: <L1>:
diff --git a/llvm/test/tools/llvm-objdump/XCOFF/print-linenumber.test b/llvm/test/tools/llvm-objdump/XCOFF/print-linenumber.test
index 0f3acacae4389..8256e27c064dd 100644
--- a/llvm/test/tools/llvm-objdump/XCOFF/print-linenumber.test
+++ b/llvm/test/tools/llvm-objdump/XCOFF/print-linenumber.test
@@ -17,7 +17,7 @@
# LINES32: Inputs/basic32.o: file format aixcoff-rs6000
# LINES32: Disassembly of section .text:
-# LINES32: 00000000 <.text>:
+# LINES32: 00000000 <.main>:
# LINES32: ; .main():
# LINES32-NEXT: ; /basic.c:1
# LINES32-NEXT: 0: 38 60 00 00 li 3, 0
diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
index 6b238fa01d258..4cb226b795255 100644
--- a/llvm/tools/llvm-objdump/llvm-objdump.cpp
+++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -957,6 +957,9 @@ SymbolInfoTy objdump::createSymbolInfo(const ObjectFile *Obj,
getXCOFFSymbolCsectSMC(XCOFFObj, Symbol);
return SymbolInfoTy(Addr, Name, Smc, SymbolIndex,
isLabel(XCOFFObj, Symbol));
+ } else if (Obj->isXCOFF()) {
+ const SymbolRef::Type SymType = unwrapOrError(Symbol.getType(), FileName);
+ return SymbolInfoTy(Addr, Name, SymType, true);
} else
return SymbolInfoTy(Addr, Name,
Obj->isELF() ? getElfSymbolType(Obj, Symbol)
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