[PATCH] D119171: [SelectionDAG][RISCV][ARM][PowerPC][X86][WebAssembly] Change default abs expansion to use sra (X, size(X)-1); sub (xor (X, Y), Y).

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM cheers - please can either add a TODO or raise a bug for better ARM/AArch64 ABS+NABS selection


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D119171/new/

https://reviews.llvm.org/D119171