[PATCH] D120001: [JITLink] Add R_RISCV_SUB6 relocation

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 17 07:24:07 PST 2022


jrtc27 added inline comments.


================
Comment at: llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp:363
+      int64_t Value =
+          *(reinterpret_cast<const uint8_t *>(FixupAddress.getValue())) -
+          E.getTarget().getAddress().getValue() - E.getAddend();
----------------
You need to mask off the upper 2 bits of the value at the address


================
Comment at: llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp:365
+          E.getTarget().getAddress().getValue() - E.getAddend();
+      *FixupPtr = (*FixupPtr & 0xc0) | static_cast<uint8_t>(Value);
+      break;
----------------
fourdim wrote:
> Can we safely assumed that, here, the `Value` is 6 bits?
> What if `(*FixupPtr & 0xc0) == 0b01000000` and `Value == 0b11111111`?
LLD will truncate, not sure if BFD will truncate or error


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120001/new/

https://reviews.llvm.org/D120001



More information about the llvm-commits mailing list