[PATCH] D120001: [JITLink] Add R_RISCV_SUB6 relocation

[luxufan via Phabricator via llvm-commits]

StephenFan added inline comments.


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Comment at: llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp:365
+          E.getTarget().getAddress().getValue() - E.getAddend();
+      *FixupPtr = (*FixupPtr & 0xc0) | static_cast<uint8_t>(Value);
+      break;
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jrtc27 wrote:
> fourdim wrote:
> > Can we safely assumed that, here, the `Value` is 6 bits?
> > What if `(*FixupPtr & 0xc0) == 0b01000000` and `Value == 0b11111111`?
> LLD will truncate, not sure if BFD will truncate or error
You are right, I need to mask off the upper 2 bits of the value at the address and truncate the `Value`




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  https://reviews.llvm.org/D120001/new/

https://reviews.llvm.org/D120001