[PATCH] D120001: [JITLink] Add R_RISCV_SUB6 relocation

[Siwei Zhang via Phabricator via llvm-commits]

fourdim added a comment.

Hi, StephenFan, I have a question in the inline comment.
Would you be so kind to explain it to us?



================
Comment at: llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp:365
+          E.getTarget().getAddress().getValue() - E.getAddend();
+      *FixupPtr = (*FixupPtr & 0xc0) | static_cast<uint8_t>(Value);
+      break;
----------------
Can we safely assumed that, here, the `Value` is 6 bits?
What if `(*FixupPtr & 0xc0) == 0b01000000` and `Value == 0b11111111`?


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  https://reviews.llvm.org/D120001/new/

https://reviews.llvm.org/D120001