[PATCH] D119171: [SelectionDAG][RISCV][ARM][PowerPC][X86][WebAssembly] Change default abs expansion to use sra (X, size(X)-1); sub (xor (X, Y), Y).

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 10 05:35:13 PST 2022


spatel added reviewers: pengfei, LuoYuanke.
spatel added a comment.

The x86 diffs seem unlikely to make much difference in real code, so this change seems fine to me. Adding some more potential x86 reviewers in case someone wants to run benchmarks to confirm.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119171/new/

https://reviews.llvm.org/D119171



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