[PATCH] D119171: [SelectionDAG][RISCV][ARM][PowerPC][X86][WebAssembly] Change default abs expansion to use sra (X, size(X)-1); sub (xor (X, Y), Y).

[Thomas Lively via Phabricator via llvm-commits]

tlively added inline comments.


================
Comment at: llvm/test/CodeGen/WebAssembly/PR41149.ll:17-18
 ; CHECK-NEXT: i32.xor
+; CHECK-NEXT: local.get       0
+; CHECK-NEXT: i32.sub
 ; CHECK-NEXT: i32.store8      0
----------------
Wasm change LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119171/new/

https://reviews.llvm.org/D119171