[PATCH] D119552: [TableGen][AMDGPU] Allow empty register classes

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir:411-412
     ; GFX908-NEXT: {{  $}}
-    ; GFX908-NEXT: $vgpr32 = V_MOV_B32_e32 killed $sgpr0, implicit $exec
-    ; GFX908-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr32, implicit $exec, implicit $exec
+    ; GFX908-NEXT: $vgpr1 = V_MOV_B32_e32 killed $sgpr0, implicit $exec
+    ; GFX908-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
     ; GFX908-NEXT: S_ENDPGM 0, implicit $agpr0
----------------
arsenm wrote:
> Looks like something went wrong or you're missing one of my recent patches
Oh yes, I was going to explain... This is because indirectCopyToAGPR does this, which depends on the internal register numbering, which has changed because ARTIFICIAL_VGPR was removed:
```
  // Registers in the sequence are allocated contiguously so we can just
  // use register number to pick one of three round-robin temps.
  unsigned RegNo = DestReg % 3;
```


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D119552/new/

https://reviews.llvm.org/D119552