[PATCH] D119552: [TableGen][AMDGPU] Allow empty register classes
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 11 09:30:29 PST 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGb59ad64eadc0: [TableGen][AMDGPU] Allow empty register classes (authored by foad).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D119552/new/
https://reviews.llvm.org/D119552
Files:
llvm/lib/Target/AMDGPU/SIRegisterInfo.td
llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
llvm/utils/TableGen/CodeGenRegisters.cpp
llvm/utils/TableGen/RegisterInfoEmitter.cpp
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