[PATCH] D119552: [TableGen][AMDGPU] Allow empty register classes
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 11 08:59:01 PST 2022
arsenm added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir:411-412
; GFX908-NEXT: {{ $}}
- ; GFX908-NEXT: $vgpr32 = V_MOV_B32_e32 killed $sgpr0, implicit $exec
- ; GFX908-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr32, implicit $exec, implicit $exec
+ ; GFX908-NEXT: $vgpr1 = V_MOV_B32_e32 killed $sgpr0, implicit $exec
+ ; GFX908-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX908-NEXT: S_ENDPGM 0, implicit $agpr0
----------------
Looks like something went wrong or you're missing one of my recent patches
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D119552/new/
https://reviews.llvm.org/D119552
More information about the llvm-commits
mailing list