[PATCH] D119552: [TableGen][AMDGPU] Allow empty register classes

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
foad added reviewers: arsenm, rampitec, critson, Paul-C-Anagnostopoulos.
Herald added subscribers: kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, jvesely, kzhuravl.
foad requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

Remove ARTIFICIAL_VGPR which only existed to make VReg_1 not empty.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D119552

Files:
  llvm/lib/Target/AMDGPU/SIRegisterInfo.td
  llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
  llvm/utils/TableGen/CodeGenRegisters.cpp
  llvm/utils/TableGen/RegisterInfoEmitter.cpp

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