[PATCH] D111497: m68k: Support bit shifts on 64-bit integers

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

To fix the ccrc copy I believe you need to add this to M68kRegisterInfo.cpp

  const TargetRegisterClass *
  M68kRegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const {
    if (RC == &M68k::CCRCRegClass)
      return &M68k::DR32RegClass;
    return RC;
  }

I'm not sure if DR32 is the right class. But ultimately you need to tell it that a regular register should be used for copy flags not CCRC class. This will convince the scheduler that converts SelectionDAG to MachineIR that it should duplicate the ADD32di that provides that flag for the two CMOV32r instead of trying to copy the flags to the second CMOV32r. This need is needed because the flags are clobbered by other instructions between the first and second CMOV32r.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111497/new/

https://reviews.llvm.org/D111497