[PATCH] D111497: m68k: Support bit shifts on 64-bit integers

Sheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 11 00:34:54 PST 2022


0x59616e added a comment.

In D111497#3313565 <https://reviews.llvm.org/D111497#3313565>, @craig.topper wrote:

> To fix the ccrc copy I believe you need to add this to M68kRegisterInfo.cpp
>
>   const TargetRegisterClass *
>   M68kRegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const {
>     if (RC == &M68k::CCRCRegClass)
>       return &M68k::DR32RegClass;
>     return RC;
>   }
>
> I'm not sure if DR32 is the right class. But ultimately you need to tell it that a regular register should be used for copying flags, not the CCRC class. This will convince the scheduler that converts SelectionDAG to MachineIR that it should duplicate the ADD32di that provides that flag for the two CMOV32r instead of trying to copy the flags to the second CMOV32r. This need is needed because the flags are clobbered by other instructions between the first and second CMOV32r.

It works !

My solution seems to be wrong because of the reason Craig just mentioned: flags are clobbered between the two CMOV32r.


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https://reviews.llvm.org/D111497



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