[PATCH] D119302: [AMDGPU] Missed sign/zero extend patterns for divergence-driven instruction selection

Alexander via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 9 10:44:02 PST 2022


alex-t marked 2 inline comments as done.
alex-t added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:2258
+  (REG_SEQUENCE VReg_64,
+    (V_AND_B32_e64 (V_MOV_B32_e32 (i32 0xffff)), $src), sub0,
+    (S_MOV_B32 (i32 0)), sub1)
----------------
foad wrote:
> ... but V_MOV here?
Because of the stupid copy-paste :)


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119302/new/

https://reviews.llvm.org/D119302



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