[PATCH] D119006: [AMDGPU] SILoadStoreOptimizer: avoid unbounded register pressure increases

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 7 11:59:20 PST 2022


arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:604-605
+    return false;
+  // TODO: Use LaneMasks for virtregs to allow non-conflicting subreg uses/defs.
+  // FIXME: Use RegUnits for physreg operands to detect partial overlaps.
+  for (const auto &BOp : B.operands()) {
----------------
foad wrote:
> arsenm wrote:
> > Generally those don't exist at this point outside of copies
> What don't? Subregs or partial physreg overlaps or both?
Both. In SSA those generally appear as plain copies to do the extract or copy from physreg


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119006/new/

https://reviews.llvm.org/D119006



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