[PATCH] D117763: [AArch64][GlobalISel] CodeGen for Armv8.8/9.3 MOPS

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp:945
+  assert(STI->hasMOPS());
+  assert(STI->hasMTE() || Opcode != AArch64::MOPSMemorySetTaggingPseudo);
+
----------------
I think this assert is still valid, isn't it?


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Comment at: llvm/test/CodeGen/AArch64/aarch64-mops-mte.ll:13
+; GISel-O0-NEXT:    mov x8, xzr
+; GISel-O0-NEXT:    setgp [x0]!, x8!, x8
+; GISel-O0-NEXT:    setgm [x0]!, x8!, x8
----------------
These instructions are invalid without MTE. The test should keep +mte


================
Comment at: llvm/test/CodeGen/AArch64/aarch64-mops.ll:3-4
+
+; RUN: llc %s -o - -mtriple=aarch64-arm-none-eabi -O0 -global-isel=1 -global-isel-abort=1                    | FileCheck %s --check-prefix=O0-GISel-WITHOUT-MOPS
+; RUN: llc %s -o - -mtriple=aarch64-arm-none-eabi     -global-isel=1 -global-isel-abort=1                    | FileCheck %s --check-prefix=GISel-WITHOUT-MOPS
+; RUN: llc %s -o - -mtriple=aarch64-arm-none-eabi -O0 -global-isel=1 -global-isel-abort=1 -mattr=+mops       | FileCheck %s --check-prefix=O0-GISel-MOPS
----------------
perhaps use --check-prefixes=GISel-WITHOUT-MOPS;GISel-WITHOUT-MOPS-O0 and --check-prefixes=GISel-WITHOUT-MOPS;GISel-WITHOUT-MOPS-O3. Same for the GISel-MOPS below. The tests with identical output can share the check lines then, which keeps things a little cleaner.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D117763/new/

https://reviews.llvm.org/D117763