[PATCH] D118321: [VE] LEGALAVL and staged VVP legalization

[Simon Moll via Phabricator via llvm-commits]

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The new LEGALAVL node annotates that the AVL refers to packs of 64bit.
We use a two-stage lowering approach with LEGALAVL:

      

First, standard SDNodes are translated into illegal VVP layer nodes.
Regardless of source (VP or standard), all VVP nodes have a mask and AVL
parameter. The AVL parameter refers to the element position (just as in 
VP intrinsics).

      

Second, we legalize the AVL usage in VVP layer nodes. If the element 
size is < 64bit, the EVL parameter has to be adjusted to refer to packs 
of 64bits.  We wrap the legalized AVL in a LEGALAVL node to track this.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D118321

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/Target/VE/VECustomDAG.cpp
  llvm/lib/Target/VE/VECustomDAG.h
  llvm/lib/Target/VE/VEISelDAGToDAG.cpp
  llvm/lib/Target/VE/VEISelLowering.cpp
  llvm/lib/Target/VE/VEISelLowering.h

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