[PATCH] D118160: [RISCV] Implement a basic version of AArch64RedundantCopyElimination pass.

Liao Chunyu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 25 20:25:58 PST 2022


liaolucy added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp:11
+// beqz/bnez instructions. For instance, the copy instruction in the code below
+// can be removed because the beqz jumps to BB#2 when W0 is zero.
+//  BB#1:
----------------
W0 is typo?


================
Comment at: llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp:95
+
+  MachineBasicBlock::iterator CondBr = PredMBB->getLastNonDebugInstr();
+  if (CondBr == PredMBB->end())
----------------
select_cc also generates beq, I'm not sure should handle it?


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  https://reviews.llvm.org/D118160/new/

https://reviews.llvm.org/D118160



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