[PATCH] D118123: [AMDGPU][MC][GFX9] Enabled TBA/TMA access via setreg/getreg

Dmitry Preobrazhensky via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 25 05:23:59 PST 2022


dp added inline comments.


================
Comment at: llvm/test/MC/AMDGPU/sopk.s:268
 // GFX10: s_setreg_b32 hwreg(HW_REG_TBA_LO), s2 ; encoding: [0x10,0xf8,0x82,0xb9]
+// GFX9: s_setreg_b32 hwreg(HW_REG_TBA_LO), s2 ; encoding: [0x10,0xf8,0x02,0xb9]
+// VI: s_setreg_b32 hwreg(16), s2 ; encoding: [0x10,0xf8,0x02,0xb9]
----------------
foad wrote:
> This is a strange example because TBA is read-only, but I guess the assembler does not know that. So OK.
Yes, the tests are rather formal. The assembler does not currently validate such things.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118123/new/

https://reviews.llvm.org/D118123



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