[PATCH] D118123: [AMDGPU][MC][GFX9] Enabled TBA/TMA access via setreg/getreg

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp:1035-1036
+    return isGFX9(STI) || isGFX10(STI);
+  case ID_POPS_PACKER:
+    return isGFX10(STI);
   default:
----------------
Did you mean to include this in this patch?


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Comment at: llvm/test/MC/AMDGPU/sopk.s:268
 // GFX10: s_setreg_b32 hwreg(HW_REG_TBA_LO), s2 ; encoding: [0x10,0xf8,0x82,0xb9]
+// GFX9: s_setreg_b32 hwreg(HW_REG_TBA_LO), s2 ; encoding: [0x10,0xf8,0x02,0xb9]
+// VI: s_setreg_b32 hwreg(16), s2 ; encoding: [0x10,0xf8,0x02,0xb9]
----------------
This is a strange example because TBA is read-only, but I guess the assembler does not know that. So OK.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118123/new/

https://reviews.llvm.org/D118123