[PATCH] D117844: [AMDGPU] Prevent aliasing of SrcC and Dst in MAI

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In D117844#3260700 <https://reviews.llvm.org/D117844#3260700>, @foad wrote:

> I don't understand the need for the new GCNPreRaFixups pass. Isn't this //exactly// what TwoAddressInstruction does, when it calls the target's convertToThreeAddress?

A call to convertToThreeAddress is an optimization and not guaranteed as far as I understand.



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Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:8279-8283
+  Register Reg = SrcC->getReg();
+  const SIRegisterInfo *TRI = ST.getRegisterInfo();
+  const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
+  const TargetRegisterClass *RC = TRI->getRegClassForReg(MRI, Reg);
+  return RC->MC->getSizeInBits() > 128;
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arsenm wrote:
> This is all static information, so can't you just set earlyclobber on the operand definition?
Making it always earlyclobber will result in massive regressions. This patch either ties operands or uses earlyclobber depending on uses, checking if source is still needed or not.


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https://reviews.llvm.org/D117844