[PATCH] D117844: [AMDGPU] Prevent aliasing of SrcC and Dst in MAI
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 21 08:20:47 PST 2022
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:8279-8283
+ Register Reg = SrcC->getReg();
+ const SIRegisterInfo *TRI = ST.getRegisterInfo();
+ const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
+ const TargetRegisterClass *RC = TRI->getRegClassForReg(MRI, Reg);
+ return RC->MC->getSizeInBits() > 128;
----------------
This is all static information, so can't you just set earlyclobber on the operand definition?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117844/new/
https://reviews.llvm.org/D117844
More information about the llvm-commits
mailing list