[PATCH] D117947: [RISCV] Don't allow i64 vector div by constant to use mulh with Zve64x

[Yueh-Ting Chen via Phabricator via llvm-commits]

eopXD updated this revision to Diff 402398.
eopXD added a comment.

Update test case.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117947/new/

https://reviews.llvm.org/D117947

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll

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